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unexpected segmentation fault changing pc register with branch

Davide Quarta over 12 years ago

Davide Quarta over 12 years ago

Note: This was originally posted on 15th May 2013 at http://forums.arm.com

As far as I know GDB cannot access those registers.
I'll ask my supervisor if he has access to a good JTAG debugger (probably we could have one lingering around in the department...)
and will write here what are the values of IFSR/IFAR.

p.s. I've checked the memory mapping on /proc/$pid/maps and it says that it's correctly allocated with permissions rwxs mapped on "/dev/zero (deleted)"

Thank you for your kind reply!
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Davide Quarta over 12 years ago

Note: This was originally posted on 15th May 2013 at http://forums.arm.com

thanks all for the reply!
i missed this piece of information: http://blogs.arm.com/software-enablement/141-caches-and-self-modifying-code/
(studied ARM architecture in two days as much as i could)
flushing the cache solves the problem.

best regards,
D.
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Martin Weidmann over 12 years ago

Note: This was originally posted on 15th May 2013 at http://forums.arm.com

I'm not a GDB expert, but can you get it show you the IFSR and IFAR values? These are the Instruction Fault Status and Instruction Fault Address registers respectively. They are how the processor reports why instruction fetch failed (which is what I'm guessing is happening). Couple of possibilities....

* The memory just isn't mapped (seems unlikely as you've just mapped it, but it's possible you made a mistake)
* The mapped region is marked as eXecute Never (XN), meaning any attempt to execute the address will fail
* Access flag (AF bit) in the descriptor has not been set by the kernel yet.
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Peter Harris over 12 years ago

Note: This was originally posted on 15th May 2013 at http://forums.arm.com

You could always printk the registers in the segfault handler.
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