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Single instruction to mask off upper half word of register
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Single instruction to mask off upper half word of register
Jawad Atiq
over 12 years ago
Note: This was originally posted on 3rd December 2012 at
http://forums.arm.com
Hi,
I've been looking around for a single Arm instruction that takes the word stored in a general purpose register and masks off the upper half word (top 16 bits).
There are probably other ways of doing this, for example:
LDR R1 = 0xFFFF
AND R0, R0, R1
But is there a specific instruction that does this? I was looking at LDRH but this instruction does not accept a register as an operand, only constants.
Thanks!
Jawad
Jawad Atiq
over 12 years ago
Note: This was originally posted on 4th December 2012 at
http://forums.arm.com
I'm using a core based on ARMv5, so I'll stick with the pre-v6 instructions.
Thanks isogen74 and sim!
Jawad
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Peter Harris
over 12 years ago
Note: This was originally posted on 3rd December 2012 at
http://forums.arm.com
You don't say what ARM core you are using, so you may not have this, but the bit-field clear (BFC) instruction probably does what you want.
BFC
R0
, #
16
, #
16
http://infocenter.ar....html#id4681858
HTH,
Iso
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Peter Harris
over 12 years ago
Note: This was originally posted on 3rd December 2012 at
http://forums.arm.com
One point of note would be the fact that the second operation in Sim's pre-ARMv6 code (the LSR) can often be packed into a register operand shift of another instruction, so if you wanted to extract the value and then add it to another value you would need one LSL instruciton, but the LSR can be packed in with the add operation. So it is only one cycle effective throughput.
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Simon Craske
over 12 years ago
Note: This was originally posted on 3rd December 2012 at
http://forums.arm.com
From ARMv6 onwards:
UXTH r0,r0
Before ARMv6:
LSL r0,r0,#16
LSR r0,r0,#16
hth
s.
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