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AHB Slave and Master standard and optional pinsets

Note: This was originally posted on 30th November 2012 at http://forums.arm.com

Hello,

I have a problem finding out which of the AHB slave-side pinsets are optional and which are standard from the specification.
Is this different than AHB-Lite, where the lsave-side interface pinset are determined as in figure 1-3, page 1-4 AHB Lite specification

Even in the specification for AHB, this is not clearly defined.
The nearest I could get comes from figure 3-23 on page 3-45.
The diagram seems to suggest that most of the slave-side signals are required, except for HMASTER, HMASTLOCK and HSPLIT, which are only required for split capable slaves.

However, there are some confusion in this diagram
a) HREADYin is missing as an input into the slave
B) HMASTLOCK has to do with the ability of the slave to perform out of order transaction, and not whether a slave is split capable or not
c) example design as explained below paints a different picture.

In the AHB example designs, a default slave, only has HTRANS and HSEL as its input and HRESP and HREADY as output. Meanwhile a static memory interface contains many more AHB signals.
Does  this mean that all slave-side signals are optional, depending on the  implementation of the slave, or is there a list of required end-point  slave signals?

Please help, I am very confused!
  Source:- Example AMBA system

http://infocenter.arm.com/help/topic/com.arm.doc.ddi0170a/index.html

Source:- AHB specifications

http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ihi0011a/index.html

Source:- AHB-lite

http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ihi0033a/index.html





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