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Large Physical Address Extension

RAVEENDRA TALABATTULA
Note: This was originally posted on 19th November 2012 at http://forums.arm.com

Hi,

Can some body explain me about the Large Physical address extension in ARM ? i.e How it is implemented ? What are the registers that are invloved?
what about the page tables?
  • Note: This was originally posted on 20th November 2012 at http://forums.arm.com

    Thanks for the reply. if 32 bit virtual address gets translated to 40 bit physical address then how come it will be useful since the total addressable memory will be still 4GB, as for generating the each physical address there should be a virtual address.
  • Arm Employee Badge
    Note: This was originally posted on 20th November 2012 at http://forums.arm.com

    The total addressable for one process is still 4GB at a time, but multiple processes can each use a different part of the physical memory unless they are sharing data. The overall system can therefore utilize the full 40-bits of physical memory.
  • Arm Employee Badge
    Note: This was originally posted on 20th November 2012 at http://forums.arm.com

    For the detailed information (register, table formats, etc....) you will need the ARM Architecture Reference Manual, Rev C or C.b.  You can get this from the documentation section of ARM's website (called infocenter).
    For the basic concept...In ARMv7 ( and earlier) addresses as used by code are called virtual addresses (VA)  and are always 32-bit. LPAE allows these 32-bit VAs to be translated into physical addresses that ate up to 40 bits long