Arm Community
Site
Search
User
Site
Search
User
Support forums
Arm Development Studio forum
Invalid opcode exception error for HVC instruction
Jump...
Cancel
Locked
Locked
Replies
3 replies
Subscribers
119 subscribers
Views
4737 views
Users
0 members are here
Options
Share
More actions
Cancel
Related
How was your experience today?
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion
Invalid opcode exception error for HVC instruction
Nicola Johnsen
over 12 years ago
Note: This was originally posted on 9th November 2012 at
http://forums.arm.com
Hi I'm developing a UEFI boot loader that can run a hypervisor. I've developed some code that initializes CPUs and then transitions from monitor mode into non-secure hyp mode. I've set up HVBAR etc but when I then call the hvc #0 assembly instruction, the runtime (UEFI tianocore on ARM Fast model simulator) reports an Invalid Opcode exception. I wonder what could be the reason for this exception? I'm using a Cortex-A15 so the instruction should be valid. I've also set SCE.HCE to 1 so the hvc instruction should be available in non-secure monitor mode. Is there anything else I'm missing here? I've already asked for help from the UEFI people but didn't get any response so I'm trying a different audience.
Cheers.
Nicola Johnsen
over 12 years ago
Note: This was originally posted on 9th November 2012 at
http://forums.arm.com
Hi there, thanks for your reply. I think I have actually fixed the problem. Initially I was in monitor mode with SCR.NS bit set to 1 (so non-secure state). But that didn't work. Then I switched to SVC with NS bit still set to 1 and it worked. From reading the ARMv7 specs, that isn't quite what I was expecting. In the specs it says that you can use HVC in monitor mode as well in order to switch to HYP mode, as long as the NS bit is set to 1. Is that not correct?
Cancel
Vote up
0
Vote down
Cancel
Martin Weidmann
over 12 years ago
Note: This was originally posted on 9th November 2012 at
http://forums.arm.com
What mode is the processor in at the point you execute the HVC? And what is the value of SCR.NS bit?
Cancel
Vote up
0
Vote down
Cancel
Martin Weidmann
over 12 years ago
Note: This was originally posted on 12th November 2012 at
http://forums.arm.com
Actually what you described is what I had expected. If you look at section B9.3.4 of the architecture reference manual ( rev C.b ) it gives the pseudo code for the HVC instruction. First bit reads:
if !HasVirtExt() || IsSecure() || !CurrentModeIsNotUser() then UNDEFINED;
Mon mode is always classed as secure, so you were falling over the the IsSecure() test.
Cancel
Vote up
0
Vote down
Cancel