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How arm cortex a9 processor Initialization by ROM Code

venkata kiran
Note: This was originally posted on 6th October 2012 at http://forums.arm.com

How arm cortex a9 processor Initialization by ROM Code
Here rom is connected to AXI Bus, Who can assert the valid signal for address 0x00 at the time of booting.
  • Note: This was originally posted on 9th October 2012 at http://forums.arm.com

    i.e, The processor will generate a read transaction(With AXI-valid Address) of 0x0 (or 0xFFFF,0000) to the AXI Bus, when it comes out of reset.

    Thanks tffn for the information.
  • Arm Employee Badge
    Note: This was originally posted on 7th October 2012 at http://forums.arm.com

    You can't attach a memory directly to an AXI (or other kind of AMBA) bus.  You will always have some sort of memory controller,although it may be very simple.

    So to answer your question.  The processor will generate a read transaction to 0x0 (or 0xFFFF,0000) when it comes out of reset.  It is the memory controller which handles the bus traffic - translating it into whatever signal interface the memory uses.