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Cycle Measurement on ARM11platform using RVISS

Vinay Kumar
Note: This was originally posted on 6th August 2012 at http://forums.arm.com

Hi all,


Iam trying to measure the performance cycles for my application on RVISS ARM1176JZF-S platform.


When I measure the cycles it is giving 471977 cycle counts,

But measuring the same application performance on different machine it is giving 423787 cycle counts (lesser than my measurement).

For measuring the performance cycles on my machine, I followed some steps of settings:

MCCFG=1 in default.ami file and given ICACHE_LINES, DCACHE_LINES to 1024.

but sitll Iam getting difference of 48190 cycles, why this difference of cycles is getting in my machine?

Is I need to set more settings other than above?

Please help me in this.


Thanks in advance,
Vinay.
Parents
  • Note: This was originally posted on 7th August 2012 at http://forums.arm.com


    First, RVISS is not cycle accurate for ARM11 family processors and so it not suitable for benchmarking.  I think ARM has a FAQ to that effect somewhere on their site.

    How are you measuring the cycles?



    Hi,

    Iam using cycle count register to measure the cycles as below,

    MRC    p15, 0, r0, c15, c12, 1   ; Read cycle count register

    and I want to measure the cycles with zero wait states(with out latencies), so though the RVISS is not cycle accurate, we need to benchmark with out latencies.


    Thanks,
    Vinay.


Reply
  • Note: This was originally posted on 7th August 2012 at http://forums.arm.com


    First, RVISS is not cycle accurate for ARM11 family processors and so it not suitable for benchmarking.  I think ARM has a FAQ to that effect somewhere on their site.

    How are you measuring the cycles?



    Hi,

    Iam using cycle count register to measure the cycles as below,

    MRC    p15, 0, r0, c15, c12, 1   ; Read cycle count register

    and I want to measure the cycles with zero wait states(with out latencies), so though the RVISS is not cycle accurate, we need to benchmark with out latencies.


    Thanks,
    Vinay.


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