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Pin Interrupt Enable/Disable Confusion

thomas ketnawang
Note: This was originally posted on 11th June 2012 at http://forums.arm.com

Hello, at the moment i study the LPC11U1x manual(Cortex-M0) and i found some very confusing thing, in the GPIO interrupt registers to enable a rising edge or level interrupt i can set a bit in IENR or delete a bit to disable the interrupt. but the CIENR disables a interrupt by deleting the corresponding  bit in IENR and again there is SIENR that only set the corresponding bit in IENR

ISEL Pin Interrupt Mode register: Selects if edge or level sensitive

IENR Pin Interrupt Enable: Enables rising edge/level interrupt
0 = Disable rising edge or level interrupt.
1 = Enable rising edge or level interrupt

SIENR Set Pin Interrupt Enable
0 = No operation.
1 = Enable rising edge or level interrupt.

CIENR Clear Pin Interrupt Enable
0 = No operation.
1 = Disable rising edge or level interrupt.

IST Pin Interrupt Status register
1 =  (edge-sensitive): clear rising- and falling-edge detection for this pin.

So if i have a rising edge interrupt i can set him over IENR or SIENR
if i wont to disable the interrupt i can do that by IENR or CIENR or IST
so IST my make sense but why CIENR and SIENR

is this for compatibility with other cortex`s?.  did i understood it right?

Regards Thomas
Parents
  • Note: This was originally posted on 13th June 2012 at http://forums.arm.com

    It makes sens new for me with the "extra" register, i was wondering but without having to do read modify write sequence, i just write to the register that makes a big different .
    so GPIO (SET,CLR) is basically the same thing or ?

    p.s.
    I got your cortex-m0 book today it relay funny that i get your reply, even before the book was with me ;-) . thank's a lot.
Reply
  • Note: This was originally posted on 13th June 2012 at http://forums.arm.com

    It makes sens new for me with the "extra" register, i was wondering but without having to do read modify write sequence, i just write to the register that makes a big different .
    so GPIO (SET,CLR) is basically the same thing or ?

    p.s.
    I got your cortex-m0 book today it relay funny that i get your reply, even before the book was with me ;-) . thank's a lot.
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