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How to understand the behavior of hazard in Cortex-M4?

HimanshuDoshi19

Hello to all,

I am working on Cortex-M4 and would like to know about the hazard situation. In order to see the effect of Data-Hazard, I have executed few application codes. For example,

LDR R5,[R6,#offset]

ADD R5,R8,R2

LDR R5,[R6,#offset]

ADD R3,R8,R2
Program-1 : Hazard Situation   Program-2 : No Hazard Situation 

Where R6 = SRAM0 address. From both the program it's clearly visible that the Program-1 would have the situation of hazard compared to Program-2. But on the execution of both these, I have observed NO DIFFERENCE in the CURRENT CONSUMPTION as well as the NUMBER of CYCLES. Why is it so?

Also, regarding the consumption of the number of cycles, I didn't find any documentation. From the observation the following table has been made:

Offsets

LDR R5,[R6,#offset]

(Cycle count on execution

of only LDR instruction)

ADD instruction 

(Cycle count on execution

of only ADD instruction)

 Number of cycles when a combination of both
0                    1                  1                                     1.5
1                    3                  1                              3
2                    2                  1                             2.5
3                    3                  1                              3

Therefore I have two major queries:

  1. Can anybody help me out with that, why are both the program's behavior is same? 
  2. Are these the correct way of generating the hazard situation in the pipeline? If not can you provide me another example?
  3. The difference in the cycle consumption is really confusing. Can anybody explain to me why such behavior?

Thanking you,

Kind regards,

Himanshu