Process ADC data, moved by DMA, using CMSIS DSP: what's the right way?

Regarding the sign extension, there is a very simple way to do it : change the scale of your data !

Before Andrea posted what he is doing with the samples, this is not an advisable trick. Now that finding the minimum and maximum values seems the only task to be done, left-shift/change of scale is a simple but effective way of sign extension.

For this project, writing a custom function for searching the minimum and maximum values rather than using the CMSIS functions is more advantageous. This is because the input samples need to be sign-extended first and the search for minimum and maximum values can be combined in a single function.

... I know I asked info about floating point conversion so, I would be happy to give the correct answer to Goodwin cause his insight is great, but then I'd need to open up a new post to continue the interesting optimization discussion.

Please, let me know if a way is better than the other and what I should do, I really don't want to take advantage of anyone.

The floating point conversion did not solve your problem. I just thought it might help if we try to find a better way of converting the samples to floating-point format. You can mark one of Jens' or thibaut's reply as the correct answer since they provided high-caliber codes and tips on optimization. It's more than enough that you are very responsive and you acknowledged the effort of those who reply.

If you are planning to have expanded discussion regarding optimization, especially new question(s), it will be better if you open a new discussion about it.

In this project I need to use the ADCHS to sample gaussian-shaped impulsive signals like these:

I only have very very little knowledge about ionizing-radiations but I think signed data format is unwieldy for the type of signal you are processing. Perhaps the quantity you are measuring is somehow associated with energy. Anyhow it's quite unusual to use negative values for gaussian-shaped signal like this.

Yesterday there was an important update to the project and a collegue was able to tell me that we need at least 40 samples (or 128 on the entire 10us duration) per spike, so this acquisition can't be slower than roughly 1.25 Msps.

(Note that I still hope to be able to perform a 40Msps acquisition and understand how to get out the most from this micro, since this would open a whole set of possibilities for the applications of my project)

If you can use an unsigned data type for the samples I speculate that you can still gain improvement in processing speed. This is because you might be able to use the data from the DMA buffer directly, no need for sign extension. You can configure the ADC for offset binary format, pack 2 samples per word, and have bits 31 to 28 and 15 to 12 read as 0. In that case the maximum value will be the one closest to 4095 and the minimum value will be the one closest to 0. As can be seen from the plot there are only peaks and valleys there is no trench.

If the right-shift and left-shift counts are the same, then yes, the sbfx would certainly be the best choice; it cost only one clock cycle.

If, however, converting to fixed point, the sbfx instruction won't be able to do it on its own.

This is because the left-shift and right-shift counts would differ.

As sbfx is a wide instruction (it spans two 16-bit words) and shifting only spans one 16-bit word, they will shorten the used program space (and be a little more cache-friendly; a marginal improvement, but it could help preventing hickups).

Two shift operations will still cost 2 clock cycles. There's another advantage: You do not have to worry about 32-bit alignment when you use a 16-bit instruction. I've experienced performance decrease if a 32-bit instruction is on not on a 32-bit boundary (performance decrease in the form of stalls).

This is an advanced topic, which I hope to cover in a document I plan on writing on how to use the IT instruction more efficiently.

Thanks goodwin for your reply.
I think you're right,

For this project, writing a custom function for searching the minimum and maximum values rather than using the CMSIS functions is more advantageous. This is because the input samples need to be sign-extended first and the search for minimum and maximum values can be combined in a single function.

and that's similar to what we came up with using Thibaut's code: that's why I'm going to give him the correct answer.

But I'd like to thank you very much: you were the first to reply here on this post and I'm glad you did.

Speaking of my project:

Perhaps the quantity you are measuring is somehow associated with energy.

Definitely, you're right. Unfortunately we have some trenches due to electronics artifacts from the analog circuitry and at the moment I don't know if I could get rid of them.
But anyway, I can't get why switching to offset binary should make me gain in Dinamic Range on the positive side: isn't it still -2048 to 2047?
Probably it is just me!

Thanks again for all your work, I'll follow your advice and eventually open a new post for my further questions.

Cheers,
Andrea

But I'd like to thank you very much: you were the first to reply here on this post and I'm glad you did.

You're welcome, very much too.

Unfortunately we have some trenches due to electronics artifacts from the analog circuitry and at the moment I don't know if I could get rid of them.

Maybe those are just noise of small amplitude not necessarily trenches.

But anyway, I can't get why switching to offset binary should make me gain in Dinamic Range on the positive side: isn't it still -2048 to 2047?

Dynamic range is not the reason why I'm suggesting that you try using the offset binary format. With offset binary format the values of the samples will just be shifted (0 to 4095) but the range is still the same.

With binary offset, the user has flexibility in interpreting the output code. If the input signal is unipolar the output code can be treated as straight binary code (0X0..0 to 0XF..F unsigned). If the input is bipolar the output is a signed data format, you can convert to two's complement by simply complementing the leftmost bit or subtracting the offset if sign-extension is needed (when the destination is wider than the number of bits from the ADC). If the input is bipolar but level-shifted to become unipolar the user has freedom whether to treat the output code as straight binary or sign-encoded.

What I am suggesting you to explore is the possibility of avoiding to reformat the data from the DMA buffer. This is possible if your ADC output is in offset binary format and you configure the FIFO so that you always read 0s from bits 12 to 15 and 28 to 31. Then you will only need to search the minimum and maximum. In thibaut's code you can remove the statement

    data <<= 4; 

or the statement(s) that you used to sign-extend the data. Getting rid of that/those statement/s translates to faster execution and it avoids the unnecessary change of scale of the samples. Moreover, you have the freedom to choose between uint16_t, int16_t, or q15_t as the data type of the samples. Even if there is a possible hindrance in using the offset binary format I have less doubt that processing using two's complement code can only be as fast but not faster with offset binary format. Thus, it's worth exploring if you can avoid the two's complement format.

So, good luck on your thesis it's an interesting application of high-performance MCU.

Thanks Goodwin for this advice!
I now understand what you wanted to say, I'll speak with the analog/physic guys that I'm working with and I'll try to see if it's possible to get a unipolar signal!
I know how to configure the offset binary and I think there should be a way to have always 0 before my samples, if not I hope that a bitwise "and" won't slow things down, but I'll see.

I'm pretty sure I'll post again about this project so, let's say "see you soon"! And again, thanks for your help.

An AND operation will cost 1 clock cycle at least.

I will expect that it will stay at one clock cycle because the compiler should prepare the AND-mask before the loop starts.

The ADC, however, should always give you the same bit-values in the upper bits.

As far as I recall, the LPC4xxx can be configured to shift the bits to the top, which means you should be able to min/max those as most-significant instead of least-significant.

Thus you would not need to do any shifting or ANDing.

If the LPC4xxx always insert zeros at the bottom, when in this mode, this might be the most beneficial setting you can get (because the ADC value would be ready for use as a fractional value).

Even if the lower bits are 'rubbish', you can always clear those bits after the min/max loop, so it won't really cause any slow-down.

-I decided to investigate things, and in UM10503, section 46.6.2 and section 46.6.4, for GDR and DRx, it says:

-So it's pretty clear: The result is aligned to the top of the 16-bit word. Your DMA should only transfer 16 bits from the DRx or GDR register.

The manual also mentions the following, which I believe is important in your case:

Remark: Use only the individual channel data registers DR0 to DR7 with burst mode or with hardware triggering to read the conversion results.

Thus the result is in the low 16 bits as follows (in binary): %RRRRRRRRRR000000, where R represents the 10-bit ADC Result.

So you don't need the AND or any bit-shifting; you get the fractional ADC result.

That means, when you've found your MIN and MAX values, you could multiply those values by 3.3 and divide by 65536.0, then you have the actual voltage (providing that the ADC reference voltage on the VDDA pin is 3.3V exactly.

If you prefer using integers (which is of course quicker), you can just multiply by 3300 and shift the result to the right 16 times, then you have millivolts. - but it should not be necessary to use integers in this case, as you'd most likely do that conversion on a PC, which is processing the captured data.