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why AHB has two disparate data bus instead of one Bus for write/read?

Hello,

with reference to the subject above,

in ahb spec.,there are both HRDATA and HWDATA buses.

However,i can't figure out any possible scenario to meet the necessary of design instead of using same data bus.

Hope someone can give some comment,thanks!!!

Best Regards,

Evelyn

  • Hello Evelyn,

    regarding input only or output only signals, AHB uses a multiplexer to distinguish read and write. But regarding in-out signals such as data bus, the multiplexer cannot be used. For example, one AHB master drove some data onto the data bus, the master should make write data high-impedance in order not to conflict the read response the other slave if the data bus would be used in common for both read and write. The normal logic cannot make high-impedance state. BBasically, the synthesizeable logic must not use in-out signals.

    Best regards,

    Yasuhiko Koumoto.

  • Dear Sir,

    thank you for reply,

    i am new to here and really not familiar with the hardware design.

    Since the AHB use multiplexer instead of tri-state, would you please help me understand the difference between tri-state and multiplexer?

    Thank you!!!!

    Best regards,

    Evelyn

  • Hello Evelyn,

    it is because why the normal logic circuits cannot make tri-state (or floating state).

    To merge the read and write data bus, the tri-state control is mandatory in order not to fight read and write data on the data bus.

    Best regards,

    Yasuhiko Koumoto.