[GIC-500v][ARMv8][A72] why SGI0 can't be triggered twice in validation test?

I am trying to work out a loop SGI0 ~ SGI15 triggering and handling test.

I made it work for only one round. A72 can trigger SGI0~SGI15 and handle it.

But when I try to trigger any SGI again, it will not enter pending state, and be distributed to A72 again.

my first round code is like

init a53/a72/GIC

use a53 to kick off a72

use a72 to read out MPIDR_EL1

use a72 to configure affinity and set ICC_SGI0R_EL1 (SGI0 from A53 to A72)

use a72 to check redistributor GIR_ISPENDER (make sure SGI enter is generated and enter pending state)

use a72 to install interrupt handler (read out IAR0 and set EOIR0)

use a72 to enable interrupt (GICR_WAKER / GIC_PRIORITY / GICR_CFG / GICR_GROUP/ GICR_ISENABLER )

SGI0 ~ SGI15 can be triggered and handled without error. but when I set ICC_SGI0R_EL1 again to trigger anyone of SGI. GIR_ISPENDER is always 0x40000000, seems SGI can't enter pending state again?

why's that? thanks in advance.