Hi all,
One of the improvements introduced by GICv3 was the ICC_* sysregs CPU interface which is no longer memory mapped. In terms of scalability this interface is clear, but what about performance?(i) Is sysreg instruction MSR/MRS faster than accessing device memory?
Now lets assume that we have GICv2 with memory-mapped interface:(ii) Are accesses to GICv2 CPU interface typically faster than GICv2 Distributer, both having same attributes for device memory mapping.
Thanks in advance.
Cheers.