I am trying to use Coresight on a baremetal system (SoC with an A-9 processor), and am having some issues reading back the contents of the ETB after executing my code.
I have gone through the PTM-TRM, the TRM for my board and other documentation, so I believe I've covered most of my bases here. I am using Xilinx XSCT to configure the PTM, ETB and Funnel registers to enable tracing on a single core. I see that the RWP register is incremented as I step through my code, and once my code is complete, I try to read from the RRD register to read back the trace data, and it gives the error "Memory read error at 0xF8801010. Blocked address 0xF8801010. Cannot access read-once register". So, I'm unable to read back any of the trace data that has been written to the ETB RAM.
I've reviewed some other forum posts here (e.g., https://community.arm.com/support-forums/f/architectures-and-processors-forum/44544/reading-etb-from-software/161616#161616), and tried replicating the same behavior (disabling ETB and PTM, flushing, etc.), but still I'm unable to access the data in the RRD register, and by extension, the ETB RAM. Am I doing something wrong here?
I'm happy to provide more information if necessary. Thanks in advance.