Take the unaligned transfer on page A3-55 in the "AMBA AXI and ACE Protocol Specification" with address 0x07 as example.
Bus width and data transfer width should be both 32 bits. First write should be to address 0x07. This would lead to bytes written to adresses 0x04 to 0x06 to be invalid so the correct write strobe from the master should be 0x08. Would it be legal for the master to set WSTRB to 0x0F and the slave has mark the lower three bytes as invalid?
Regards
Martin