The recent announcement of Arm DynamIQ technology has generated a lot of curiosity within both the tech industry and the tech-savvy consumers, regarding the impact on the future of big.LITTLE technology. The short answer is that big.LITTLE technology is included as a part of DynamIQ. Let’s take a step back and see how this all ties in with the bigger picture.
When big.LITTLE was launched in October 2011, it became the world’s first heterogeneous processing technology to enter the mobile market. The architecture of this technology consisted of a cluster of high-performance ‘big’ CPUs and a cluster of high-efficiency ‘LITTLE’ CPUs, linked through a coherent interconnect. Above this, sat a software layer (Global Task Scheduling) that seamlessly scheduled the right application task onto the right CPU.
Over the years, newer CPUs have been introduced to deliver more capabilities, performance and higher energy efficiency. The software layer was also updated to incorporate more intelligent algorithms for task scheduling. However, during that time, the base hardware technology architecture remained largely the same with two (or more) clusters of big and LITTLE CPUs.
This technology was quickly adopted in the mobile market, where power efficiency and battery life is key to user experience. It is no wonder, then, that two out of every three Android Armv8-based devices shipped today rely on big.LITTLE for power / performance optimization.
Whilst the potential combination of ‘big’ and ‘LITTLE’ CPUs remain the same, DynamIQ brings a new technology architecture that changes the landscape of heterogeneous processing. It does this by combining the big and LITTLE clusters to form a single, fully integrated CPU cluster that consists of both big and LITTLE CPUs. big.LITTLE designs that are built using DynamIQ are referred to as DynamIQ big.LITTLE. DynamIQ big.LITTLE systems incorporate intelligent power features within the cluster that help extract every ounce of performance within fixed thermal budgets. This means higher-than-ever data processing and performance, providing richer experiences, no matter what application you are using.
DynamIQ big.LITTLE introduces the following benefits:
We as consumers are expecting higher levels of compute capabilities in our smartphones, with every new device that gets released – and this holds true for premium to entry-level smartphones. To put this in perspective, when PokemonGo was introduced to the mobile market in 2016, it became the #1 application you had to have, even on a budget smartphone. Product differentiation within the System-on-Chip (SoC) is becoming increasingly important to meet consumer demands for higher performance, especially in price-sensitive markets
The new integrated cluster in a DynamIQ big.LITTLE system will work for existing, popular CPU combinations, such as 2+4 (2xbig and 4xLITTLE), but also introduces new combinations that increase the scope of product differentiation particularly in mid-range markets. These new combinations, such as 1+3 and 1+7, will see ‘big’ CPUs increasingly used in mid-range markets to deliver higher levels of performance, compared to conventional 'LITTLE'-only designs. However, the scope of scalability does not stop here. DynamIQ big.LITTLE systems also allow for the tuning of individual or groups of CPUs to different performance and power points within a single cluster, resulting in a nearly unlimited design spectrum. The flexibility offered by DynamIQ opens doors to differentiation for price-sensitive markets.
Although UX is constantly changing over time, due to the evolving usage of applications, one thing remains constant: UX is very dependent on single thread compute performance for responsiveness. Advanced use cases, such as Artificial Intelligence (AI) and Augmented Reality (AR), will continue to demand higher levels of UX. However, as the mobile space is quick to remind us, thermal budgets limit the amount of performance achievable in a device. Thermal efficiency is an issue that transcends the mobile space and plays a huge factor in other markets, such as automotive and laptops.
To overcome this, one of the techniques that big.LITTLE systems rely on is Dynamic Voltage and Frequency Scaling (DVFS) to produce two complementary performance domains that each increase in voltage and frequency in unison. DynamIQ takes this technique a step further by supporting multiple, configurable, performance domains within a single cluster. These domains, consisting of single or multiple Arm CPUs, can scale up and down in performance and power by up to 4x finer granularity than previous Cortex-A quad-core clusters.
This DynamIQ technology feature means DynamIQ big.LITTLE systems are capable of extracting higher amounts of performance from tighter thermal budgets, resulting in longer periods of sustained performance. Such systems will also be able to take advantage of bursts in boosted performance that deliver higher responsiveness and UX for activities such as launching applications or performing gestures, e.g. rotating, swiping and pinch-to-zoom, be it on a touchscreen or touchpad.
All task migrations between big and LITTLE CPUs now take place within a single CPU cluster through a shared memory, with the help of an upgraded snoop management system, which results in improved energy efficiency. The transfer of shared data between ‘bigs’ and ‘LITTLEs’ now take place within the cluster. From a system perspective, this reduces the amount of traffic being generated, which in turn, reduces the amount of power spent, providing an overall system efficiency benefit.
DynamIQ big.LITTLE systems also benefit from larger cacheable memory in the CPU cluster. The memory size is completely configurable and enables a larger amount of heterogeneous processing to happen within the cluster, reducing accesses to external memory, and thus, reducing the amount of power used in the system when running certain applications. It also means that CPUs spend shorter amounts of time waiting for data, hence improving performance while reducing power.
DynamIQ big.LITTLE also takes advantage of the advanced power features in DynamIQ technology. DynamIQ systems are designed with faster transitions between CPU power states (e.g. ON, OFF and SLEEP). This shortens the time it takes a CPU to enter an idle mode or to completely power off, leading to more efficient transfer in/out of idle. There is also an autonomous memory power management feature that intelligently adapts the amount of local memory available in the cluster, depending on the type of application running on the CPUs.
To summarise: The improvements to power and thermal efficiency in constrained environments, offered by big.LITTLE, have enabled devices to push on compute performance, thus delivering a richer user experience to consumers. With DynamIQ technology, we are on the brink of an exciting new age of heterogenous processing. DynamIQ big.LITTLE promises higher levels of efficiency for high-performance, advanced use cases, such as AR and VR; spring-boarding the next era of rich and innovative user experiences.
From a software perspective, the Energy Aware Scheduler (EAS) development for the Linux Kernel is designed to handle advanced System-on-Chip (SoC) configurations, including the new DynamIQ features. EAS support for basic configurations is already available for Linux, including Android and other Linux derivatives. Android also now has task classification that can be used to boost key tasks, to provide the best user experience from a device with EAS.
The top three benefits offered by DynamIQ big.LITTLE, as compared to big.LITTLE on its own:
Having said that, it is worth remembering that big.LITTLE is just one of the many supported features of DynamIQ technology. DynamIQ systems also offers significant benefits to homogenous systems (i.e. non-big.LITTLE systems) across all markets.
To find out how DynamIQ technology redefines the multi-core experience to enable future technologies that transform our everyday lives, please check out my blog Arm DynamIQ – Technology for the next era of compute or DynamIQ on Arm.com.