Functional safety is a critical element in the design of any system that requires a high level of reliability. It enables the ability to detect, diagnose and safely mitigate the occurrence of a fault, ensuring the safe operation of a system in the event of error or malfunction. Functional safety is a key technology for many markets, particularly automotive, but also others such as aviation, transportation, industrial and healthcare.
Arm is fully committed to providing the IP, software development tools, test libraries and documentation required for successful, efficient development of a wide range of applications. We aim to have the broadest functional safety solutions in the industry.
With our ecosystem partners, we provide technology that enables robust reliability through the application of functional safety. Arm has developed application, real-time and microcontroller processors which support systematic capability for ISO26262 ASIL D, the highest automotive safety integrity level.
Arm is proud to announce that it has received the functional safety certificate from TÜV Rheinland for the Arm Cortex-R5 processor, applying to ISO 26262 and IEC 61508. Additional processors with these capabilities, as well as other products in the Arm portfolio, will also be going through this assessment to receive their certificates.
The functionally safe processor IP needs to be laid down onto silicon as transistors, and Arm supplies an Artisan Physical IP platform dedicated to automotive, which is optimized for Arm processor cores. NXP has licensed the Arm Artisan Physical IP dedicated automotive platform for TSMC 16FFC in the new NXP S32 automotive processing platform. The Artisan Physical IP supports ISO 26262 and AEC-Q100 Grade 1 requirement to ensure reliability and safety which are vital for automotive system applications such as autonomous driving.
Being able to verify that a processor is working safely and correctly in a running system is an important element of functional safety. To this end, Arm is developing a set of Software Test Libraries (STLs) for a range of processors. The STL consists of functions which can be run within the program code to check that the different areas of the processor logic are working as they should. This STL can be run at start up and during program operation, maintaining coverage of a running system. As with the processor IP described above, the STLs will undergo safety assessment by an independent body. The first of these Software Test Libraries is for the Cortex-R52, a real-time processor ideal for use in functional safety applications.
The need for functional safety extends beyond the hardware; software is of equal importance. To facilitate software development, Arm offers a comprehensive safety package for the Arm Compiler C/C++ toolchain to provide toolchain justification in a safety application. Arm Compiler 6 itself has been qualified by safety experts TÜV SÜD to enable its use in automotive IS0 26262, industrial IEC 61508, railway EN50128 and medical IEC 62304 applications.
To further help developers, Arm announced a safety certified version of the popular Keil RTX5 real-time operating system (RTOS), complemented by commonly used C library functions and an extensive set of supporting documentation. Combined with the TÜV-certified Arm Compiler toolchain and software test libraries (STL), the new runtime components provide a reliable, more secure, and highly optimized software platform that enable engineers to shift their efforts from low-level software layers onto the value-add application code.
Please visit our functional safety page which will give more of an overview of Arm’s offerings, links to more technical information, and a whitepaper which delves into more detail.
Visit functional safety page
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Congrats to ARM for the release of this safety processor. The importance of functional safety is increasing steadily, which means
GrammaTech is committed to help in the software domain by fine-tuning it's source and binary static analysis capability to support functional safety on the ARM processors, development toolchain and ecosystem.
Congrats again Neil!