The SoC Implementation community is the place to be when planning or designing your SoC. Here, we discuss design and implementation, Artisan or other physical IP, manufacturing processes and technology challenges.
Whether you are an established designer, a SoC expert or just getting started with selecting a process and physical IP, keep visiting the SoC Implementation community to stay informed.
Share best practices, design knowledge and interesting subjects with discussion or blog posts, learn a bit, and ask or even answer questions.
|Discover content in this place||Ask for assistance/feedback on your community||Share your experience with a blog|
|Exploring the ARM CoreLinkTM CCI-500 performance envelope - Part 1 1 year ago||by nickheaton|
|ARM - Xilinx Faculty Workshop on ARM University Program's SoC Design Lab-in-a-Box (LiB) 2 years ago||by Sadanand Gulwadi|
|Using ARM Compiler 6 with Carbon Performance Analysis Kits (CPAKs) 2 years ago||by Jason Andrews|
|Apple iPhone6 and Smart Watch: The Design Implications 2 years ago||by bfuller|
|Quality of Service in ARM Systems : An Overview 2 years ago||by Ashley Stevens|
|Tons of technical sessions on Synopsys solutions at ARM TechCon 2014 2 years ago||by Phil Dworsky|
|Interesting Article ..... Making Chips Run Faster 2 years ago||by stephen.crosher|
|Self test of Cortex-m0 2 weeks ago||by jsyoo|
|BCM-2836 techical information 6 months ago||by johnfaig|
|Requirements for SMMU 8 months ago||by ispark|
|Is there any optimal configuration to driver CCN504? 10 months ago||by ocean0208|
|Has anyone instrumented current power consumption ? I know about RAPL in intel processors. 11 months ago||by jaberme|