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Error Synthesizing Design Start ARM Cortex M3 on Xilinx FPGA

Joshua Ennis
  • [Synth 8-5809] Error generated from encrypted envelope. ["v:/hardware/CW305_DesignStart/CW305_DesignStart.gen/sources_1/bd/block_diagram/ipshared/ea75/rtl/cm3_dap_ahb_ap.v":1]
  • [Synth 8-5809] Error generated from encrypted envelope. ["v:/hardware/CW305_DesignStart/CW305_DesignStart.gen/sources_1/bd/block_diagram/ipshared/ea75/rtl/cm3_dap_ahb_ap.v":1]
  • [Synth 8-12188] Failed to read verilog 'v:/hardware/CW305_DesignStart/CW305_DesignStart.gen/sources_1/bd/block_diagram/ipshared/ea75/rtl/cm3_dap_ahb_ap.v'
  • [Common 17-69] Command failed: Synthesis failed - please see the console or run log file for details


    Here are my errors, I don't understand why the encrypted IP block won't synthesize. Any help would be greatly appreciated.