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HI,why the VFP vector mode can not be used in cortex-a series processors?

HI,why the VFP vector mode can not be used in cortex-a series processors?

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  • > so why removed it?

    In general the ARM instruction set has been getting simpler and simpler over time. This is for two reasons:

    1. Weird instructions and complex modes of operation are generally difficult to use when generating code in compilers, which forces developers to hand-code assembler to get best use out of them.
    2. In general it is more efficient in modern high-frequency cores to run multiple single cycle instructions than cope with the hardware complexities introduced by complex multi-cycle instructions.

    It's worth noting that the VFP vector mode was still scalar processing - i.e. the maths unit could just execute one vector entry every clock cycle, and multiple lanes took multiple cycles. NEON is therefore faster; i.e. a vec8 fp32 operation would take two NEON instructions, rather than one VFP vector strided instruction, but on most implementations would take two cycles rather than the eight the VFP operation would take. NEON also has vector data load support, which provides another efficiency improvement.

    HTH,
    Pete

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  • > so why removed it?

    In general the ARM instruction set has been getting simpler and simpler over time. This is for two reasons:

    1. Weird instructions and complex modes of operation are generally difficult to use when generating code in compilers, which forces developers to hand-code assembler to get best use out of them.
    2. In general it is more efficient in modern high-frequency cores to run multiple single cycle instructions than cope with the hardware complexities introduced by complex multi-cycle instructions.

    It's worth noting that the VFP vector mode was still scalar processing - i.e. the maths unit could just execute one vector entry every clock cycle, and multiple lanes took multiple cycles. NEON is therefore faster; i.e. a vec8 fp32 operation would take two NEON instructions, rather than one VFP vector strided instruction, but on most implementations would take two cycles rather than the eight the VFP operation would take. NEON also has vector data load support, which provides another efficiency improvement.

    HTH,
    Pete

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