Hi, arm experts:
as per arm Spec, FEAT_ETS2 introduces support for enhanced memory access ordering requirements for translation table walks.
For example:
MOV X0, <valid descriptor>
STR X0, [descriptor_addr] // change descriptor from invalid to valid
DSB ISHST
LDR X1, [X2] // access the VA stored in X2
IIUC, LDR may raise a fault without FEAT_ETS2.
The spec also says, An Effect E1 is ETS-ordered-before an Effect E2 if one of the following applies:• All of the following apply:— FEAT_ETS2 is implemented.— E1 is an Explicit Memory Effect.— E1 appears in program order before E3.— E3 is a TLBUncacheable Fault Effect.— E2 is Translation-intrinsically-before E3.— E2 is an Implicit TTD Memory Read Effect.
the definition above does't mention anything about DSB.
Back to the example, since there is a ETS-ordered-before relation when FEAT_ETS2 is implemented, do we still need a dsb there?