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Forums

  • Servers and Cloud Computing forum

    The latest forum discussions about the Arm Servers and Cloud Computing ecosystem for cloud native edit to cloud application development and deployment.
    101 questions
    romain beurdouche
    RE: ArmRAL: Wrong usage of k0 in LDPC rate matching 8 months ago
  • SoC Design and Simulation forum

    The latest forum discussions for community-based support for System-on-Chip (SoC) and Arm simulation models.
    713 questions
    Colin Campbell
    RE: AHB: Address and control signal stable during waited write access 5 days ago Arm Employee Badge
  • SystemReady Forum

    The SystemReady forum covers all aspects of the Arm SystemReady compliance program, including associated specifications (BSA, SBSA, BBR), Architecture Compliance Suite (ACS) testing, and implementation considerations for pre-silicon and SystemReady bands.
    15 questions
    vstehle
    RE: How to run ARM ACS 7 months ago Arm Employee Badge
  • TOSA forum

    Tensor Operator Set Architecture (TOSA) provides a set of whole-tensor operations commonly employed by Deep Neural Networks.
    1 question
    Oliver Beirne
    RE: Forum FAQs 2 months ago Arm Employee Badge
  • 恩智浦汽车电子MCU讨论区博

    4 questions
    Song Bin 宋斌
    RE: [TRK-KEA64使用经验分享] 开箱体验 亮瞎我的双眼 over 10 years ago Arm Employee Badge
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All questions in this Community
  • Answered

    gnu toolchain for compiling Cortex-A code on my MAC os version 10.14. +1

    21629 views
    1 reply
    Latest over 6 years ago
    by 42Bastian Schick
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    Why do LPIs in GIC have no "active" state? 0

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    这里有中国人么 0

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    by ChenTang Arm Employee Badge
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    *** error 57: illegal address (0x8000000) 0

    • Keil MDK
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    • Keil MDK
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    by dponyatov
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    • Cortex-A
    • Program Flow Trace Macrocell (PTM)
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    Started over 6 years ago
    by alireza11048
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    double file name "stm32f4xx.h" exists in MDK 0

    • MDK-Arm
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    by wang gaoteng
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    L251 map file symbol table 0

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    by KSOKOREA
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    USB driver update failed 0

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    Latest over 6 years ago
    by PallaviRusia
  • Answered

    How to verify the Cortex-M0 thumb instructions ? I found one chip( RAM &FLASH is OK) when it run LDR relative instructions,the program is in Hardfault。But others run the same code is OK 0

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    Latest over 6 years ago
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  • Suggested Answer

    outstanding transaction in AXI4 protocol 0

    15977 views
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    Latest over 6 years ago
    by Christopher Tory Arm Employee Badge
  • Answered

    Sending NULL character ('\0') over a TCP connection 0

    12466 views
    4 replies
    Latest over 6 years ago
    by Pratheep k
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