This is a paper covering a introduction of AMBA 5 AHB5 and AMBA 4 Q channel (one of the protocols covered in the AMBA 4 Low Power Interface Specification).
The on-chip system design of microcontrollers and SoCs can have a significant impact on the overall security, power efficiency and responsiveness of the device. This paper outlines the key aspects of the system design and looks at new technology developments that promise to improve the security of these SoCs while still enabling high efficiency and low latency designs.