Dear Sirs,
I am using the ARM-Cortex M0 and want to run the debug mode in keil.
I refer the ram.ini in example file as below,
And according to my M0 to modify the ram.ini as below,
I don't have idea how to set vector table offset for M0.
As I know the vector table for M0 from address 0x04 (reset handler),right?
My questions are,
1.Should I set vector table offset for M0?
2. Does any document describes the ram.ini?
3. What do the _WDWORD and_RDWORD mean? ( Write DWORD , Read DWORD? )
What does the value 0xE000ED08 and 0x20000000 mean ?
(I have checked the document for STMF103.
the address 0x20000000 is belong to SRAM bit-band region,
the address 0xE000ED08 is belong to Private peripheral bus)
Thanks for your help.
BR,
Eddie
shihwen chou said:I am using the ARM-Cortex M0
What chip, exactly?
Are you using a real chip, or the simulator?
shihwen chou said:I have checked the document for STMF103
You mean STM32F103?
That's a Cortex-M3 - not M0
Dear Andy,
The reference ram.ini is used for STM32F103. I modify it for my environment.
Currently I am using ARM M0 IP and test it on FPGA.
There are only 2 questions, thanks for your reply.
1. No need to set vector table offset for M0