We have an Intel Stratix 10 SoC Development Kit which contains Intel's new Stratix 10 SoC device. It contains FPGA fabric as well as a hard processor system (HPS) containing the ARMv8-A Cortex-A53.
Since the board is relatively new, Intel has yet to provide any tutorial or examples on how to get started developing bare metal software for the processor. There are no "hello world" examples or anything like that. Other than thousands of pages of technical reference manuals, all they have really provided (or subcontracted another company to produce) was a precompiled linux kernel, some guidance on modifying the device tree, and how to generate a flash image for booting. While that alone opens a lot of doors, it still forces you to run with linux, which is very undesirable for our project.
So I'm getting no help from Intel (trust me I've blown up their FPGA forums to a bunch of dead silence, even asking for a "hello world" example), and I was hoping someone from this forum can help get me going, or at least point me in the right direction.
I think all I need to do is get a basic build process down: startup code, linker script, and application. After that, I need to figure out how to download and debug to the target. There are a few clues in Intel's documentation AN 802:
"Embedded Software Debugging and Trace.
The HPS Debug Access Port (DAP) can be accessed through dedicated HPS pins configured as JTAG, or it can be accessed through FPGA JTAG interface pins.
The option to access the HPS JTAG interface through the FPGA JTAG pins is available in the Intel® Quartus® Prime Pro Edition project.
At power up, the FPGA appears as the first device in the JTAG chain. Once the FPGA is configured with an image for which the HPS JTAG interface is made available to the FPGA JTAG pins, the HPS appears as the first interface in the JTAG chain; and the FPGA appears as the second interface. This requires different connection settings for the FPGA tools, like the Intel® Quartus® Prime Pro Edition Programmer when it is used at power up and after FPGA configuration"
So I used their "Golden Hardware Reference Design" (GHRD) Quartus Project which indeed instantiates the HPS JTAG interface in the FPGA fabric. The Stratix 10 SoC Development Kit utilizes a "Intel FPGA Download Cable II" which is a USB-to-JTAG type interface, and the Quartus Software was able to recognize a JTAG chain and program the FPGA fabric. Once it was loaded, the JTAG chain now included the "S10HPS" device. So it looks like the HPS DAP interface has been exposed via JTAG.
So this is where I get stuck. I downloaded ARM DS IDE, and attempted to create a "New Debug Connection", "Hardware Connection". A list of target devices appeared, but there was no selection for Cortex-A53, and no selection for ARMv8-A. So I tried "Add a new platform..." and it has a big blank text box. At the bottom, I can select the connection type "CMSIS-DAP" (the only selection with "DAP" in the name), and it asks for a connection address. I'm not really sure what to put into connection address. Looking at how the Quartus software accesses the JTAG chain, it mentions a local server on USB-1. So in the "Connection Address:" box, I tried "USB:1", "USB-1", "USB:127.0.0.1", "127.0.0.1", as well as "USB:0" and such. I just get "Connection failed, please check the connection address"
So please let me know if you have any guidance or suggestions. I think I need to know how to get the ARM DS IDE to recognize and utilize the JTAG chain that exists on the "Intel FPGA Download Cable II". Like I said: Intel has let me down in terms of any kind of support, and the forums are getting me nowhere as well.
HiYou wrote:>A list of target devices appeared, but there was no selection for Cortex-A53, and no selection for ARMv8-A. >So I tried "Add a new platform..." and it has a big blank text box.That's strange - have you installed a license AND selected a toolkit variant in Help -> Arm License Manager?Arm Development Studio supports Intel Stratix 10 out-of-the-box, however, it might be better for you to use the "DS-5 Intel SoC FPGA Edition" instead, which is specifically customised and supported by Intel, and which supports the Intel FPGA Download Cable II - see:https://developer.arm.com/tools-and-software/embedded/legacy-tools/ds-5-development-studio/editions/customized-editions/intel-soc-fpga/intel-soc-fpga-edition
Hope this helpsStephen
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