This February I attended the Symposium on High-Performance Computer Architecture (HPCA) in Washington D.C, which celebrated its 25th anniversary this year. To commemorate the occasion, a special mention was made to Laxmi Bhuyan, Yale Patt and Dharma Agrawal, the organisers of the first HPCA and who have played a pivotal role in establishing it as the influential conference it is today.
Apart from being a milestone HPCA, this year’s instance also brought significant insights from both academia and industry. The two main underlying themes this time were accelerators and security.
Srini Devadas from MIT gave this insightful keynote, which discussed the importance of systems having comprehensive security measures in the wake of recently surfaced side-channel attacks. To protect future designs the case was made for hardware/software co-designed security from the ground up based on context isolation using, for example, enclaves. From the keynote and other engaging talks across the event, it is clear that security is a prominent design requirement for future systems, and that future academic research is eager to pick up the challenge.
In terms of accelerators, this talk started a lively debate, as it argued that benefits for architectural specialisation are usually a one-off, with limited upside stemming from optimisation. Their retrospective look at recent accelerator designs claims that most of the improvements derive from improvements in the process technology. Hence, the projected end of Moore’s law will lead to the ‘accelerator wall’: a term that describes the diminishing returns the authors expect that accelerators will experience in the near future.
Whether the above prediction is accurate remains to be seen. However, constant innovation in multiple fields will probably allow us to maintain our current steady pace of improvement to extend beyond Moore’s law. Innovations such as 3D integrated circuits, wafer-scale implementations and other bleeding-edge technologies coupled with emerging workloads will likely require us to develop novel architectures and re-evaluate our established designs. From this perspective, as scaling improvements become harder and less predictable, the necessity to rediscover computer architecture will undoubtable bring new excitement to the field.
The above points were perfectly encapsulated in the inspirational keynote titled “When Moore met Feynman: Ultra-dense data storage and extreme parallelism with electronic-molecular systems” delivered by Karin Strauss from Microsoft Research. This talk described recent work that crosses the fields of computer architecture and biology, showing ways to manipulate DNA structures so that they can be used to store digital information with attractive properties such as great longevity in terms of data retention and also outstanding storage density. I recommend watching the talk, which can be found here.
One of the takeaways from that talk was the vision of post-Moore systems will not only feature a conventional CPU and GPU but also a slew of other accelerators, not limited only to machine learning but also covering areas such as genomics, quantum computations, mixed reality and many more. This resonates with Arm Research, as a similar vision was shared at the 2018 Arm Research Summit by Arm CTO, Mike Muller. In that talk he stressed the need to diversify post-Moore to cater to the emerging applications using different technologies, not limited to CMOS.
From Mike Muller's 2018 Arm Research Summit Keynote: What's Next?
The majority of people attending seemed to share this vision, as throughout the conference most sessions featured some form of accelerator in a plethora of domains. These included graph applications, bioinformatics and genome sequencing, graphics, virtual reality, machine learning, neural networks and many more! This fundamental change of how we build our systems will bring a new set of exciting challenges to overcome, such as dealing with rapid design cycles without compromising the functionality of our systems, software stack integration, and transparency across diverse systems to mention a few. On a personal note, it is exciting to see that this coincides with our goals in Arm Research, as we investigate problems such as how emerging hardware technologies like 3D integrated circuits, new accelerators and non-volatile memories can be seamlessly integrated into the world we live in today.
Another highlight worth mentioning was the panel discussion on “How to improve HPCA”, moderated by Josep Torrellas from the University of Illinois, and including Lisa Hsu from Microsoft Research, Ulya Karpuzcu from University of Minnesota, John Kim from KAIST and Reetu Das from University of Michigan. The concept that academia needs to have a feel of the pulse of industry in order to consistently stay relevant seemed to resonate with the panel and participating researchers, and is also reflected in a recent ACM SIGARCH blog post by Ulya Karpuzc.
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As well as the insightful presentations and many stimulating discussions, it was a particularly memorable conference for Arm, as together with our collaborators at the University of Edinburgh and EPFL we were recognised with the Best Paper Award for “Stretch: Balancing QoS and Throughput for Colocated Server Workloads on SMT Cores”. The paper is based on the astute observation that many modern systems balance batch and latency sensitive tasks. In those cases, resources such as the reorder buffer can be dynamically allocated between the two task types to handle both of them without violating quality of service requirements.
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Why not join us at the Arm Research Summit? This unique research-focused event is taking place in Austin, Texas, this September, and brings together academics, researchers and industry experts from around the world to discuss the latest computing challenges. You can share your own work - the Call for Submissions closes on May 13 - or register your interest so you don't miss out on early-bird registration.
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