I was 17-years-old when I learned one of the most important electronic behaviors that drives a big part of my technical work nowadays. I chose an electrical engineering career maybe because of a memorable duo of science teachers that made the case of pursuing a university degree in engineering. Or maybe it was that dissecting a stinking dead frog was not that appealing after all. Nevertheless, I vividly remember the day I learned the differential equation linking the current through a capacitor and the voltage across it as presented in figure 1:
Figure/Equation 1: Symbol of a capacitor.
This equation tells us that it takes time to fill a capacitor of size C, with a stream of charges flowing at a rate Ic(t), giving a voltage across the capacitor Vc(t). The equation remains valid until the capacitor fills up completely, or in other words, the voltage becomes too high and the capacitor is damaged. This is a first order behavioral description that comes from a fundamental approximation that my teacher of the time omitted to mention. It assumes that the capacitance, C, of the capacitor is constant over the domain of use, which is not the case in many applications where you want it to be constant. While we are here, let us write another fundamental equation I learned that same day, linking the voltage across an ideal capacitor as a function of the electric charges stored by the device:
What is the deal with M0N0, Arm’s ultra-low-power microcontroller? We wrote about the buck-converter embedded in M0N0, and why we have designed a brand-new control circuit for this application. This converter converts the battery voltage Vbat into a lower voltage Vout that supplies the digital subsystem comprising of the Arm Cortex-M33 of M0N0, as presented in figure 2. Designing any power-converter is a matter of compromises. For M0N0, we focused on efficiency at an extremely low output power by designing a buck converter operating primarily in pulse frequency modulation mode. That is just a tiny part of the whole story, and one which we are going to unfold in this post.
Figure 2: Simplified diagram of the M0N0 microcontroller system, blue blocks: Vbat power-domain, yellow blocks: Vout power domain.
I have realized that the 17-year-old I was, had all the necessary tools and knowledge in physics and mathematics to unfold that reasoning. Let us take the long and winding road that leads to one of the secrets of this buck converter, using only the mathematical tools that I knew then. This post is not just about the destination, it is mostly about the journey.
Figure 3 presents a simplified diagram of the architecture of a buck converter. Two switches drive one end of an inductor, whose other end is connected to the load and a large output capacitor. At this stage, it is necessary to introduce the inductive counterpart of equation 1:
This equation tells us that the current through an inductor varies following a linear time invariant differential equation of the voltage applied across it. If the voltage across the inductor is constant, the current rises or falls steadily.
Figure 3: Simplified diagram of the buck converter embedded in M0N0.
Figure 4: Pulse Frequency Modulation operation of the buck converter.
The buck converter operates by switching the two switches ON and OFF according to a modulation strategy. Let us consider a Pulse Frequency Modulation (PFM) strategy first. Figure 4 presents a time diagram of the PFM operation. We can assume that the output capacitor is charged and large enough to maintain the output voltage Vout, quasi constant while delivering the load current, Iout to the load (the Cortex subsystem). Both switches are OFF, and there is no current flowing through the inductor. The switching node, SW, is in high impedance, and the switching node voltage Vsw equals Vout. Thus, the load discharges the output capacitor, Cout, following equation 1 so that the output voltage variation is:
The circuit is designed to cope with some small variations of the output voltage Vout, but sooner or later the capacitor charge needs to be replenished. This is achieved by generating a conduction pulse. The high-side switch, swhs in figure 3, is turned ON. The switching node is no longer in high impedance and its voltage, Vsw, is pulled to the input voltage, Vbat. The voltage across the inductor is then: Vbat – Vout and according to equation 3, the inductor current starts rising with the slope:
At this stage, we need to make some assumptions:
With those assumption in mind, we can assume that the inductor current rises steadily with a slope that follows equation 6: where is the average value of X(t):
After a predetermined amount of time, Ton, the converter turns OFF the high-side switch and turns-ON the low side switch, swls. Keeping our assumptions in mind allows us to write the down slope equation:
When the inductor current reaches zero after a duration Toff, the low side switch is turned OFF and the switching node keeps a high impedance until the next conduction pulse.
The amount of charge transferred from the input to the output during the conduction pulse can then be calculated by integrating the inductor current over Ton and Toff. Simply put, the area of the triangle highlighted in gray in figure 4:
The burst charges are absorbed by the output capacitor that receives the pulse charges Qpfm , while also delivering the output charges Qload. The net increase of charges across the capacitor is then:
We know from equation 2 that this generates an output voltage increase that we call a ripple and its value can be calculated as:
We can then use equation 4 and equation 10 to determine how long the discharge time lasts before having to start another conduction pulse, but let us take a slightly different path.
So far, we have discussed how the capacitor is charged by the conduction pulse and discharged by the load. During a conduction pulse, the output voltage of the buck converter rises slightly and falls during the high-impedance phase. The control circuit of the buck monitors the output voltage and triggers another conduction pulse to raise the output voltage again when necessary. This way the average voltage across the output capacitor stays constant with only a small ripple superimposed on the steady voltage. Thus, based on equation 1, it is easy to determine that the average capacitor current is zero, otherwise there would be a large variation of Vout.
A by-product of that conclusion is that the average current through the inductor is equal to the average load current. Applying Kirchhoff’s current law to the output node is straightforward, if the average capacitor current is zero (what goes in, goes out shortly after) then one can write:
Why do we call this operation mode PFM? We are a stone’s throw away from reaching the point. Let us write the average inductor current as the charge flowing through the inductor over one iteration of conduction pulse and high-impedance discharge:
We have seen in equation 8 that the converter delivers a pulse. This is done by setting an ON-time, Ton, while Toff is the result of voltage balance across the inductor (Toff lasts until the inductor current is zero), yielding to a transfer of charges Qpfm. The only way to balance equation 12 is by adjusting Thiz. Varying Thiz as a function of the load current means that the interval between the pulses is variable. In other words, the frequency of the pulses is modulated. When the load current increases, the buck generates pulses more frequently, keeping the average current through the capacitor to zero. Similarly, when the load current decreases, the buck generates pulses further apart, maintaining the balance between the average inductor current and the load current.
The simplest way to implement a PFM controller is to design a circuit that monitors the output voltage and generates the two conduction times, Ton and Toff when the output voltage drops below a reference point. Keeping electrical circuits simple often helps in making them low power, as we described in this blog post. We also write about why M0N0 needs a very low-power control circuit for the buck converter here. Not only can a PFM modulator be very low power, but the power-element operation of the buck is also very efficient. This is what M0N0 needs.
To achieve unprecedented levels of power consumption in the control circuit of the buck converter at such low battery voltage, we had to limit the maximum pulse density to one pulse every 15 µs. The buck converter generates a current pulse by limiting the peak of the inductor current, Ipk, to 100 mA through a 4.7 µH inductor. Despite this large peak current and with appropriate input filtering, even tiny batteries can power M0N0.
If each conduction pulse delivers a finite amount of electrical charge to the output, and the maximum rate of conduction pulse is bounded, it is straightforward to assume that the buck converter controlled by our newly designed PFM modulator has a maximum output current capability. Where does the limit lie? From equation 8 we know that for a given operating point (Vbat, Vout) we can calculate the amount of charge per pulse by determining Ton and Toff.
Applying equation 3 we can determine the ON-time, Ton:
Solving the integral term is easier assuming that the battery and output voltages are static. This approximation does not introduce a significant error. Rearranging terms yields:
Similarly, we can determine the OFF-time, Toff:
Replacing the Ton and Toff expression in equation 8 gives:
Considering the typical battery voltage case where the battery voltage is 1.2V, we can determine the maximum load current that the buck converter can deliver as a function of the load voltage. Knowing that the buck converter PFM modulator controls Ipk to be 100mA, we can determine the charge transferred to the output side of the converter in one PFM pulse, Qpfm. Knowing that the converter can transfer only Qpfm calculating the maximum output current is straightforward. I spare you the equation and jump directly to the characteristic presented in figure 5:
Figure 5: Maximum output current and output power of the Buck converter operating at 1.2 V battery voltage.
The maximum output current is a U-shaped curve, with a minimum at 0.6V and 5.17 mA. The U-shaped curve has a minimum at which can be easily predicted when analyzing equation 16 closely. We have also plotted the maximum output power of the buck converter as a function of the output voltage. For M0N0, power can be more relevant than current as the maximum supply current needed by the CPU subsystem varies with Vout. We have selected the peak current of the conduction pulse, Ipk, to be high enough for delivering the maximum power the CPU subsystem needs. This is while being small enough to keep the size of the passive components small.
So far so good, but, as you may know by now the devil is in the details and this topic is no different. We have used first order differential equations, integrals, and derivatives, combining several equations and rearranging terms, but we have not used sequences. Trust me, they can be used for many things other than predicting the size of a population of bunnies.
Let us assume that the CPU subsystem of M0N0 is OFF and we wanted to increase the buck output voltage significantly, for instance a 200mV increase between 450mV and 650mV. To simplify the problem, we can assume that the supply current of the digital subsystem is negligible, Iout = 0. M0N0’s buck controller generates one conduction pulse every 15 s to raise the output voltage as fast as possible. Building on equation 16, we can describe the output voltage increase at the pulse n+1 based on the output voltage at the pulse here:
This leads us to the recurrence equation 18:
How long would the buck converter take to transition between 450mV and 650mV? Arithmetic sequences are very easy to calculate using spreadsheet software. Figure 5 presents the result of equation 18 when the converter generates a pulse every 15 µs with no load current computed using a simple spreadsheet formula. In those favorable conditions, it takes about 400 µs for the converter to ramp-up the supply voltage of the digital subsystem.
Figure 6: Output voltage increase with no output load (Iload = 0) modelled using the arithmetic sequence.
Why and when does the Cortex subsystem supply voltage rise and fall? Most CPUs employ a dynamic voltage and Frequency Scaling (DVFS) clocking and supply strategy to save power. The CPU runs with a low frequency and low supply voltage when the software workload is low. But when high throughput is required, the clock frequency of the CPU is set at higher frequencies, resulting in an increase to the supply voltage of the CPU. M0N0 is no different and the computing performance point can be selected with software depending on the user’s application.
However, absolute speed is different from reaction speed. M0N0 can run relatively fast, at up to 38MHz clock frequency, and slow with best-in-class energy efficiency, making it a unique 32-bit microcontroller device where low power is not necessarily slow. What we do not advertise is how fast it can transition between operating modes. For M0N0, transitioning from one voltage and frequency point to another voltage and frequency point depends partially on how fast the buck converter of M0N0 can raise its output voltage.
Did we ever mention that M0N0 wakes-up from an external signal in less than 1 millisecond (ms)? In less than 1ms, M0N0 transitions from its 10nW sleep mode with Memory retention mode and battery monitoring to an Arm Cortex-M33 executing software at up to 38MHz from read-only memory. For M0N0, waking-up in 1ms is not just about raising the output voltage of the buck converter:
This leaves approximately 850 µs to start the buck converter. We have designed a control circuit for the buck converter that wakes-up within a few nanoseconds, so that problem is solved. But it still needs to ramp-up the output voltage by charging this now famous output capacitor.
The issue with equation 18 is that it has no solution for Vout[n] = 0. That is because of the assumption that the ripple voltage is small with respect to the voltage across the inductor does not hold in this case. We could look further into the details, but that would require more complicated mathematical tools than what we are limiting ourselves to in this blog post. Thus, let us take a quick shortcut. We have seen in figure 6 that it takes approximately 400 µs to raise the output voltage by 200mV between 0.45V and 0.65V. Starting M0N0 requires us to raise the output voltage of the buck converter from 0V, to anything between 0.45V and 0.8V. Assuming a similar ramp-up speed means we would miss the 1 millisecond target by a few hundred µs.
Having crossed many obstacles so far, we are not going to revert to the beginning just because a requirement is a little difficult to achieve. We could solve that by raising the peak current of the PFM current pulse. More charges would be transferred from the battery input to the output decoupling capacitor. This latter component integrating the charges according to equations 1 and 2 would give the voltage rise we want to achieve. The output voltage ripples would be larger as detailed from equation 10, but M0N0 could still function correctly. There is one issue, however. Arm researchers cannot resist beating the specifications by some comfortable margin.
We have discussed the PFM scheme so far. The current that our buck converter can deliver in PFM is limited by our control circuit. Enter the Pulse Width Modulation technique (PWM) presented in figure 7. Using this modulation scheme when raising the voltage quickly allows us to increase the reaction speed of M0N0. Then, the buck converter operates in the energy-efficient PFM mode when stable Vout is required.
Figure 7: PWM operation of a buck converter.
PWM operation of a buck converter is described in figure 7. The high-side switch is ON during the duration Ton and the low-side switch is ON during the duration Toff. The converter operates with a fixed cycle duration T and the ON and OFF times share the overall period so that equation 19 is verified:
When the high-side switch is ON, during the duration Ton, the inductor current rises following the differential equation 3, and equation 6 is verified. Similarly, when the low-side switch turns ON during the duration Toff, equation 7 is verified. Switching between the ON and OFF phase, the inductor current respectively rises and falls. If the converter switches fast enough, the current variation (current ripple) is small, and the average inductor current is controlled and can track an arbitrary trajectory.
Let us determine the inductor current at the end of the conduction cycle as a function of the inductor current at the beginning of the cycle. Keep the assumption that the output voltage ripple is negligible with respect to the voltage across the inductor. This leads us to equation 20:
Solving the integrals is straightforward with constant terms:
This equation tells us that the inductor current at the beginning of the conduction cycle n+1 is a function of the inductor current at the beginning of cycle n, the battery, and output voltages of the buck converter and the arbitrary ON and OFF conduction times. The amount of charge transferred to the output side of the buck converter during one conduction cycle is simply the gray area in figure 7; the area of a rectangle and two triangles:
Comparing equation 22 against equation 16 gives an interesting contrast between the PFM operation and the PWM operation of the buck converter. In PFM operation, the charge transfer is independent from previous pulses and is fixed. PWM operation on the other hand, allows the inductor current to build up over time, leading to a faster charge transfer that turns into a faster charge of the output decoupling capacitor. Yes, we are still referring to equation 1.
If you made it this far, you may be wondering what this is all about. I warned you that this may be a long journey, but now is time to sit back, relax and enjoy the landing.
We have designed a buck converter for M0N0 and to make it very efficient we have used a PFM modulation scheme. Despite it being very efficient at the extremely low operating power of M0N0, it is also slow to react because of the limited current capability of the PFM mode and its implementation. Therefore, when a fast transition is required, the converter operates in PWM, enabling it to carry more charges from the battery to the output-side of the buck converter.
Low power is not necessarily slow, and figure 8 presents how M0N0 starts from an external wake up request, extwake. Waking-up M0N0 requires the extwake signal (top-green, ch2 signal in figure 8) to rise from 0V to Vbat. After a short time, the buck converter of M0N0 starts switching and the switching node is presented in figure 8, the second signal from the top, ch3 in blue with legend “sw”. The buck starts switching in PWM mode. About 400 µs later the output voltage of the buck has risen to the targeted value, the third signal from the top, ch1, in yellow with legend “Vreg”. It takes some time for the internal logic to settle before the CPU executes the software. The last signal is the Cortex subsystem clock, in red, ch4, and legend “tcro”. Mission accomplished in just 700 µs.
Figure 8: Start-up operation of M0N0, external wake-up signal (ch2, green), Buck-switching node (ch3, blue), Buck output voltage (ch1, yellow) and CPU subsystem clock (ch4, red).
Looking at the output voltage, Vout = Vreg in figure 8, the voltage linearly rises at start-up with a rate of 0.5V in approximately 300 s. It is the voltage across the capacitor Cout and from equation 1 we know that:
We also mentioned that at start-up Iout is negligible, thus:
Everything is in place now, and the inductor current is broadly constant because the capacitor voltage increases steadily, and its value is:
That is already three times more than the maximum average inductor current of the converter operating in PFM.
Could M0N0 react faster? We could improve the delay between the settling of the buck converter and the start of the CPU subsystem. We could increase the ramp-up speed of the buck converter too. This option is available with software in the M0N0 system, and here we have just presented what M0N0 does by default without programmer intervention. There is one caveat, however; the buck input current is the battery current, and not all batteries are created equal when dealing with loading. Another topic for a future blog post? Maybe, who knows.
We have come to the end of this journey. Starting from a simple equation, we have reached this point, at the crossroad of the software that controls the Dynamic voltage and Frequency Scaling of the CPU subsystem. The physical properties of small batteries ultimately limit how fast the buck converter can raise its output voltage, and the electrical properties of an inductor and a capacitor. Years ago, I had not thought about how far those few equations could lead us. Needless to say, that the wider journey is far from over.
Start from the beginning, and get the full M0N0 story - from how the project first began, to the efficiency of the design.
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