Hi, AHB-newbie here.
For AHB-lite is there any way that the Slave may signal to the Master that it is not ready to accept any transactions?
Driving HREADY low only extends the data phase of the current transaction.
My understanding that the MASTER always expects the respective slave to always be ready to sample the Address on the Address Phase.
Is there also any way for the slave to tell the master that the current address phase needs to be extended?
Thanks.
Simple answer, no.
Sorry but the slave bus interface must always be able to accept a new transfer request (address phase), and only then once it is in the data phase of that request (if it is a NONSEQ or SEQ request) can it signal wait states to stall the master.
So even if internally your slave is busy with some other operation, the bus interface logic itself must be free to accept a request.
Thanks for the info.
Can I say that
1. Coming out of reset, all slaves must drive HREADY high
2. HREADY is only sampled by the MASTER on the data phase -- to check if wait states are needed.
For number 2, when HREADY has been detected low, can the Master continue to issue new transaction requests on the bus? Per my understanding, with HREADY low no slave will actually sample the HADDR
The coming out of reset case is a special one in that in theory there is no previous transfer address phase for the slaves to be responding to, but the requirement that the slaves all drive HREADY high just ensure that as soon as HRESETn is deasserted that any master state machine is free to move on to its first post-reset real address phase transfer, and then one further cycle later the first addressed slave can then respond to a real transfer data phase.