GICv2 How to resolve Multiple Interrupt appearing on a CPU

Hi All,

I am facing issue where, in the event of multiple interrupts on GIC in close vicinity,  I am unable to decide on which interrupt has been asserted, to service them properly.


This is a simulation Setup.

This is a multicore(4) system with GIC v2

All the interrupts (5) of them are configured to be of different priority. All are targeted to the same CPU Core.

When the IRQ appears, I read the GICC_IAR and GICD_SPISR, both these register give me the ORed value of the Interrupt ID and not the Interrupt ID of the highest priority Interrupt. And thus I am not able to decide on exactly which interrupt were asserted.

Request Forum's experience to help me in resolving this issue.

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