I am new to protocols AHB and AXI.
can anyone explain why there is 4kb boundary in AXI and why there is 1 kb boundary in AHB?
Also what these boundaries are for? Does they represent the maximum slave size?
Starting off with why address boundaries are specified, the master (AXI or AHB) has no idea what the physical structure of the slaves in the memory map is, so it doesn't know when a burst would reach the end of one physical device and move on to the next physical device.
In AXI you only have one address transfer for a transaction, so if a burst were to cross from one slave to another, only the first slave device would see the address transfer information (unless the bus interconnect logic were to break this burst up into 2 shorter bursts). For an AHB burst each slave would see address information for each beat of the burst, but signals such as HBURST would not always signal the correct burst length, and the second slave would see a burst starting with a SEQ transfer, not a NONSEQ.
So address boundaries were specified for each protocol, and bursts cannot cross these boundaries to ensure they always remain accessing just one physical slave, and that slave then sees address information and indicated burst lengths for the transfers it will receive.
This does then indicate a minimum slave size (the minimum address space that must be allocated to a slave) and slaves smaller than this size are responsible for responding to any transfer within this minimum size (perhaps with an ERROR response). This does not indicate a maximum slave size as slaves can span multiple address boundaries.
The address boundary is a restriction on the transfers a master can produce, not on the maximum size of the slaves.
As to why AHB is 1kB and AXI is 4kB, this is simply down to the age of the protocols. When AHB was first released in 1999 it wasn't common to see wide data buses (32-bits and 64-bits would be common), so with a maximum defined burst length of 16 this meant typically 128-byte long bursts, which wouldn't often be impacted by the 1024 byte boundaries. However AXI first released in 2003 started to see wider data buses implemented, so 128-bit and even 256-bit buses were often used, so again with 16 beat bursts this would mean 512 byte long bursts which would then hit 1kB boundaries quite often, hence 4kB being seen as less of an impact,
We didn't want to make the address boundaries too large as that would start to have an impact on the maximum number of slaves you could have on the bus (or the amount of wasted space if the actual slave footprints were really small), so the address boundary is a compromise between supporting typical bursts and supporting the maximum number of slaves.
thanks alot thats help me
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