I am reading ACE protocol and i am confused about when to use cache maintenance transactions. On what basis should i decide when to use cache maintenance transaction and which transaction to be used?
Can anyone please help?
The cache maintenance operations in ACE can be linked to the the cache maintenance operations executed by a master, such as an Arm processor. If we use the Arm Architecture as a reference, we can form a mapping between the instructions executed, and the transactions that might be issued on the interface.
DC CVAC is a Clean by VA to PoC instruction. This could be mapped to a CleanShared.
DC CIVAC is a Clean and Invalidate to PoC instruction, and so could be mapped to CleanInvalid.
DC IVAC is an invalidate by VA to PoC, and so could be mapped to MakeInvalid.
The reasons for using these cache maintenance operations could be varied. One common reason would be to guarantee that data is visible to a specific domain. For example, data in a cache might not be visible to all agents within a system. The cache maintenance operation could make it visible.
Thank you for replying.
I still don't understand in which scenario a cache will issue cache maintenance transaction in a multi core system which is in outer shareabilitity domain.
It's an explicit decision by the programmer to execute an instruction that generates one of these instructions. If your target a cache maintenance instruction at a region of outer shareable memory, then the instructions meaning is applied to all masters in the same domain. This can mean the master is required to broadcast this cache maintenance operation if the domain is shared with other masters.
So for example, if you decide to Clean and Invalidate a VA to the PoC for a region of outer shareable memory, all the masters in the Outer Shareable domain need to clean and invalidate this line if they have it. They know to do this by receiving a CleanInvalid snoop, which was initiated by the master sending the transactions.
Thank you for the reply.
I understood what you told. But i have one more doubt, In data cache, what can be the scenario that a data cache will issue a cache maintenance transaction??
for a region of outer shareable memory, all the masters in the Outer Shareable domain need to clean and invalidate this line if they have it. They know to do this by receiving a CleanInvalid snoop, which was initiated by the master sending the transactions.
Thank you for the reply. I understand that why the transaction is issued but how does the cache know the shareable domain of memory (supposedly main memory)?
In an Arm A-class CPU, this would be determined by the page tables - in other words, regions of memory will be defined with a specific shareability. When memory is loaded into the CPU cluster, it will be tagged with the shareability.
Thank you for you reply. I have understood now>
View all questions in Embedded forum