I have a question regarding the data during the BUSY state in a AHB bus. Consider the following example of an AHB master writing data onto an AHB slave:
In the above case will the data written be as follows:
Or will the data written be as follows:
Or is it in some other way the data is written.
Thanks in advance.
Your first solution is correct(ish). 0x01 will get dataB and 0x03 will get dataD. The data phase of the NONSEQ follows immediately after the NONSEQ address phase, so dataB is the data for the NONSEQ access.
However the address of the BUSY (0x02) is the address the master next intends to access, so the address for the SEQ access is also 0x02 (HADDR does not change when moving from BUSY to SEQ).
Thank you Colin Campbell for the answer.