I am doing some tests using a baremetal code with trustzone on rpi3 (having a cortex-a53 processor). Considering the fact the rpi3's processor does not support all the ARM trustzone features (i.e. No TZPC, TZASC or other proprietary bus/fabric security control interfaces), I wonder if there is any other way on cortex-a53 to make some part of the memory only accessible at EL3 and protect it against accesses from other exception levels, for example EL2?
 Slide 7, docplayer.net/98594601-Easing-access-to-arm-trustzone-op-tee-and-raspberry-pi-3-09-26-16.html
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