Hi all - I'm trying to understand stage 1 translation.
Assuming that the translation is starting at level 2, how do you determine the number of page table entries in the level 2 table? The documnetation says it can have up to 512 for 4kb granule size. I guess the same question goes for starting at level 1...is there a formula to finding this out?
I have a stage 1 translation that appears to have the following and I'm trying to make sense of it.
T0SZ - 38
1ea level 2 table with 32 entries2ea level 3 tables each with 512 entriesDocument reference: Arm Architecture Reference Manual Armv8, Table D5-19 Properties of the address lookup levels, 4KB granule size, page D5-2577
Fro the Armv8-A, each translation table descriptor uses 8-byte ( 64-bit).For Level 2 table of 4KB granule size, 512 entry x 8 byte = 4096 bytes = one 4K page. That's the reason you can see 512 entries for this case.
When T0SZ=38, the valid VA bits = 64 -38 = 26.
So Level 1 table has 5 bits. The entry number will be 2^5 = 32 entries.
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