I can't find any information whether d-cache could be used in ARMv8-A with disabled MMU. I found smth here -
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.faqs/ka8788.html, but it seems not related to ARMv8-A.
The information to answer this conclusively is distributed around the Arm v8-A Architecture manual that can be found here
Basically, if the MMU is disabled, then this akin to disabling stage 1 address translations, which, according to sec. D5.2.9 'The effects of disabling a stage of address translation' means that data accesses are assigned the Device-nGnRnE memory type (this assumes HCR_EL2.DC != 1, see text for more on this case).
This means that data accesses are treated as Device memory accesses and then, taking sec. D4.4.1 'General behavior of the caches', we have the statement :
"It is guaranteed that no memory location that does not have a Normal Cacheable attribute is allocated into the cache."
We can stop there as you are asking only about D$. So as the data memory accesses are seen as being to Device memory, this means that they would not be cached.
Hope this helps/clarfies things for you.....
Hi Stuart Hirons,
Thank you for detailed explanation! So AFAIU when MMU is disabled I can't use for example "prfm" cpu instruction to preload data into cache, because memory is handled as device memory, right?
You need to have the MMU enabled. This should be done on start up as the performance of the core will be poor otherwise (no D$ enabled, no speculative prefetching as memory is being treated as Device mem and core can't perform speculative accesses to Device memory)
If you have access to Arm's Development Studio tools then there are several Arm v8-A start-up examples included within there.
Thank you, Stuart Hirons!
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