Arm Community blogs

In my first blog, we examined gave the historical context of the instruction set battles of ARM and x86, covering the RISC-CISC Wars in the PrePC Era and the PC Era. This blog covers Round 3, the PostPC…

This two-part blog gives a historical perspective on the ARM vs. 80x86 instruction set competition for three eras: PrePC (late 1970s/early 1980s), PC (mid 1980s to mid 2000s), and PostPC (late 2000s onward…

The 2010 ARM Technology Conference (Techcon) is taking place in Santa Clara next week. A large number of companies will be presenting their solutions to support development and optimization of products…

Wow it's that time again; our 4th release of Ubuntu on ARM is upon us. In the past we have provided a Freescale iMX51 image, a Marvell Dove image and a TI OMAP 3 image for Beagle Boards. This cycle…

This post is part of a series:Condition Codes 1: Condition Flags and CodesCondition Codes 2: Conditional ExecutionCondition Codes 3: Conditional Execution in Thumb-2Condition Codes 4: Floating-Point Comparison…

In the last article, I explained how to modify SWP code to make use of compiler intrinsics.  Using intrinsics hides the underlying detail needed to use the load and store exclusive instructions (LDREX…

Before ARMv6, the main synchronisation mechanism was the SWP instruction. SWP has two aspects, in a uniprocessor system it allows the read and write operations not to be interrupted between them.   In…

Once you move beyond short sequences of optimised Arm assembler, the next likely step will be to managing more complex, optimised routines using macros and functions.

This post aims to provide a simple introduction to Arm assembly language.