Tools, Software and IDEs blog

Ultra-low power applications require careful software validation to achieve long battery lifetimes and sensitive hardware needs electrical isolated test connections to prevent from interference voltages…

Today ARM announced a lower cost, very high performance debug and trace unit to complement the existing ARM DSTREAM and Keil ULINK product families.

ARM DS-5 Development Studio is a suite of tools for editing, compiling, analyzing, and debugging embedded C/C++ software for the ARM architecture. The DS-5 Debugger can be used with virtual prototypes…

Yesterday, I have held a webinar with element14 that talked about the benefits of MDK. Here's the conversation log.

The Streamline Performance Analyser can already make use of the Linux perf sub-system but so far this has only been under the hood via the gator daemon (which can collect other data too).

ARM models can be used to compare optimization switches and understand compiler choices for ARM Compiler 5 and ARM Compiler 6.

It’s DS-5 release time, and this release packs a bunch of new functionality and improvements. Note this release, DS-5 v5.26, is the last release that has support for 32-bit host platforms.

ARM has released new SystemC Cycle Models on ARM IP Exchange. This marks the first time cycle accurate models are available from ARM for SystemC simulation. Along with the new models, a number of example…

Last week, we have released MDK v5.22. This release includes support for ARM Cortex-M33 and ARM Cortex-M23 devices based on the ARMv8-M architecture. MDK v5.22 adds ARM Compiler 6.6 which is required for…

The race is on. The path to secure end-to-end IoT is now paved with the announcement of the ARM® Cortex®-M23  and Cortex-M33  processors. They are the first deeply embedded processors to include…

The ARM® Cortex®-R52 processor is the most advanced processor for functional safety and the first implementation of the ARMv8-R architecture. Along with the announcement of the Cortex-R52, ARM…

Additional core supportDS-5 v5.25 Professional and Ultimate Editions support cache visibility for Cortex-A5 and Cortex-A7 cores. Ultimate Edition also supports cache and MMU visibility for Cortex-A73,…

The ARM Embedded Logic Analyzer (ELA) brings particular challenges to a debugger. The flexibility of the ELA and the broad range of implementation choices and potential uses, all place demands on a debugger…

In order to keep costs, power consumption, and size to a minimum, many embedded products based on ARM Cortex-R cores have limited on-chip memory. In particular, the size of the Tightly Coupled Memory …

In DS-5 v5.24, we added the Stack View to the debugger. This view displays stack information that used to be displayed in the Debug Control View, giving two advantages. Firstly, the Debug Control View…

The CoreSight cross-trigger network in a SoC is created from two components: Cross Trigger Matrix (CTM) devices form the backbone of the network and transport events around the SoC; and Cross Trigger…

OverviewCMSIS++, or rather POSIX++, is a POSIX-like, portable, vendor-independent, hardware abstraction layer intended for C++/C embedded applications, designed with special consideration for the industry…

The Arm Cortex-M7 processor is the most recent and highest performance member of the versatile Cortex-M processor family.

In previous blogs we covered an introduction to System Trace Macrocell (STM) concepts and terminology, and the STM Programmers' model with an example of how to generate efficient trace data. Once the…

In this blog, the second in a series, we explore the programmers' model for the ARM System Trace Macrocell. A previous blog covered basic concepts of the STM architecture and implementation. Example…

This article aims to introduce the ARM System Trace Macrocell (STM), outlining what it is, its basic operation, and why one might want to use it. Example code will be provided, minimally targeted at the…