2018 Arm TechCon Innovation Awards Finalists Named

Technology that uses hardware interlocks to improve device security; a microcontroller that leverages asynchronous logic, dynamic voltage frequency scaling and near-threshold voltage operation to operate at super-low power levels; an artificial intelligence-driven model generator. These are just a few of the finalists selected for this year’s Arm TechCon Innovation Awards.

What are the Innovation Awards?

The Innovation Awards each year celebrate the spirit of invention and Arm-based electronics design in the Arm ecosystem. Nominations are open to companies that are exhibiting at Arm TechCon (Oct. 16-18, San Jose Convention Center) and, this year, represent achievements in the area of overall design innovation, contribution to IoT security, best use of advanced technologies and outstanding design team.

This year’s finalists, in the following categories, are:

Contribution to IoT security

• Microchip Technology (SAM L11). Designed to protect customer applications from both remote and physical attacks, the SAM L11 32-bit microcontroller (MCU) combines leading security features with low power consumption and water-tolerant, noise-immune capacitive touch. The device is the industry’s first Arm Cortex-M23 with robust chip-level security features and Arm TrustZone for Armv8-M.
• Dover Microsystems (CoreGuard). CoreGuard provides non-subvertible, hardware-optimized, fine-grained enforcement of software-defined security policies that protects the entire software stack.
• NewAE Technology (ChipWhisperer-Lite 32-bit). A variety of advanced attacks such as side channel power analysis make securing IoT difficult, especially when engineers are often unaware of the attacks. ChipWhisperer-Lite 32-bit helps validate both hardware and software cryptographic library or accelerator functions.

Advanced Technologies

• ETA Compute (ECM3501). ECM3501 delivers an image classification neural network (CNN) on a dual core Arm Cortex-M3 plus DSP SoC operating at 40MHz, for intelligent and power efficient devices. The design consumes only 0.4mJ per image. Previous design of the same CNN on a Cortex-M7 at 216MHz consumed 30mJ per image, 75X increase in energy consumed.
• Mirabilis Design (VisualSim Architect). VisualSim AI-Driven Processor Generator produces a pipeline-and timing-accurate architecture model of Arm processors in two days and simulates a full SoC at 250,000 instructions.

Design Innovation of the Year

• GOWIN Semiconductor (GW1NS-2C SoC FPGA with Arm Cortex-M3). GOWIN Semiconductor's GW1NS-2C implements a barebone Cortex-M3 tightly coupled with GOWIN's FPGA technology offering a complete SoC solution delivering small size, low power, and highly flexible functionality in a shared resource environment.
• ETA Compute (ECM3531). Eta Compute’s third-generation MCU includes patented delay insensitive asynchronous logic (DIALTM), dynamic voltage frequency scaling and near threshold voltage operation into their DIAL3 ECM3531. The MCU uses an Arm Cortex-M3 and operates below 1MHz to over 100MHz while consuming single digit milliwatts of power.
• NXP (i.MX RT Crossover Processors). The i.MX RT1050 was first in a line of “crossover” processors NXP introduced in 2018. It features an Arm Cortex-M7 processor core, which, at 600 MHz, combines high performance with an interrupt latency as low as 20 nanoseconds. It integrates includes 512KB of Tightly Coupled Memory (TCM) SRAM for real-time IoT applications. An integrated DC-DC converter eliminates the need for an external PMIC and improves active power efficiency.

Design Team of the Year

• SecureRF: The design team, led by Chief Scientist Dr. Iris Anshel, includes SecureRF’s engineers, mathematicians, and cryptographers who have created innovative future-proof Secure Boot and Processor-to-Processor security for critical connected platforms including automotive, industrial, supply chain and consumer electronics.
• Avatar: Avatar this summer began demonstrating the industry’s first detailed-route-centric physical implementation solution for advanced nodes through 7nm processes. Avatar's technical design team includes the original ATopTech place-and-route experts and has worked together as a team for more than two decades. The team is led by Ping San Tzeng, Ph.D., chief technical officer, who was one of the original developers of ArcCellXO, developed at ArcSys in 1992.

Announcing the Winners

On Wednesday Oct. 17, we’ll be hosting a guided, show-floor tour of all the finalists to chat with the innovators about their technologies and teams. That will run from 3:30-5pm (Pacific Time). At 5 p.m., the winners will be announced at the Arm TechCon theater stage in the exhibits hall.

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