This year’s ARM TechCon conference in Santa Clara sees ARM disclosing details of its next processor architecture; ARMv8-R. This eighth-generation ARM architecture is already established as ARMv8-A for applications processors and is now also profiled for real-time embedded systems products, hence the ‘R’suffix.
Architectural consistency is a key enabler for our business, our silicon partners and the ARM ecosystem, i.e. all those companies making, supporting and writing applications for ARM Powered® products. Detailed descriptions of ARM architectures are published in Architecture Reference Manuals available from the ARM InfoCenter. In this way, ARM can produce a range of processors with differing performance and feature sets, all of which can run the same software Operating Systems and applications. One architecture leads to many ARM processors, hundreds of silicon partners, thousands of semiconductor devices, millions of OEM products and billions of users!
New ARMv8-R processor implementations will enable the next generation of microcontrollers and ASICs for embedded systems to deal with the ever-increasing complexity of software and significant new requirements for performance, responsiveness and Functional Safety. Much of this complexity comes from trends we see in industries such as automotive electronics and factory automation. Here there is increasing use of model-based automated code generation and a requirement to re-use and integrate code coming from different programming teams at different times. The new ARMv8-R architecture permits this ‘consolidation’ of software onto a single processing platform whilst at the same time maintaining strict isolation between different tasks, applications and even Operating Systems, such that they cannot interfere with each other – some people refer to this as ‘sand-boxing’.
ARM Cortex®-R4, Cortex-R5 and Cortex-R7 real-time processors have been used in Functional Safety applications for many years now. These are systems where the electronics must continue to function in the presence of faults in order to keep people and things safe from hazardous situations, for example electric power steering or vehicle stability electronics in a car. These processors use the ARMv7-R architecture and they offer safety features such as memory protection, error checking of instruction and data memory and the capability to operate two processors in lock-step so as to detect any faults appearing in the processor logic.
The new ARMv8-R architecture builds on current technology and adds innovative features for an even faster response to real-time events, hosting more complex software safely and consolidating a rich mixture of software with additional levels of memory protection. These features use a Hypervisor mode in processor hardware, which is where a virtual machine monitor, or virtualiser, will run to manage the software consolidation and safe memory protection.
The ARMv8-R instruction set enhancements are similar to those in the ARMv8-A applications architecture; however there are a few differences specific to each profile such as the system instructions for managing memory protection. Otherwise the instruction sets have advanced together, for example with new instructions for ordering memory accesses between processes according to the latest C programming language requirements. There are also enhanced floating point instructions according to the latest IEEE standard, Cyclic Redundancy Check instructions are included, system instructions to manage the interrupt controller and so on.
The other difference between ARMv8-R and ARMv8-A, at least for now, is that the real-time profile will not be supporting 64-bit register width and the A64 instruction set. Instead it will just support the 32-bit instruction sets with backward compatibility included for ARM and Thumb® from ARMv7-R, which ARMv8-A also has. The reason for this is that the initial roll-out of processors implementing ARMv8-R will only require 32-bit operation. 64-bit operation can be added at a later date but we will wait until we fully understand those high-end real-time market requirements before committing that part of the architecture specification.
ARM is working right now to develop new Cortex-R processors with ARMv8-R architecture and lead silicon partners are engaged with us on the project. Any further announcement is probably a year away still, but it’s important that details of the new architecture are made public so that potential users can plan for it and so that the software ecosystem can be made ready. The detailed description of the ARMv8-R architecture remains confidential for a few months and can be made available to ARM partners upon request.
I’ll follow this up in my next blogs, talking more about our Hypervisor technology and its potential applications.
Thanks Chris for this excellent blog introducing the new ARMv8-R architecture. I'm looking forward to hearing more about this at the ARM Tech Con next week.
I just read this paragraph over on rodcrawford's blog ARM Techcon 2013: Applying New Technologies to New Opportunities Track which is related - it also gives details of the session that Simon is presenting at Tech Con next week:
'Last but by no means least Simon Craske will be revealing details of how the ARM Cortex-R real-time processors are evolving to power the next generation of integrated control and safety systems required to bring technologies like Advanced Driver Assistance systems and Hybrid-electric powertrains to the car in your garage.'