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ARM MCU Resources - Documentation
Alban Rampon
November 6, 2014
1 minute read time.
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Definitive Guide to the ARM Cortex-M0
Definitive Guide to the ARM Cortex-M3
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Related User Guides and App Notes
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Software Development
Cortex-M0 Devices Generic User Guide
Cortex-M0+ Device Generic User Guide
Cortex-M3 Devices Generic User Guide
Cortex-M4 Devices Generic User Guide
Instruction Timing Information
Cortex-M0 Technical Reference Manual
(TRM)
Cortex-M0+ Technical Reference Manual
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Cortex™-M1 Technical Reference Manual
(TRM)
Cortex-M3 Technical Reference Manual
(TRM)
Cortex-M4 Technical Reference Manual
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Architecture (requires registration)
ARMv7-M Architecture Reference Manual
ARMv6-M Architecture Reference Manual
ARM Application Notes
AN237 - Migrating from 8051 to Cortex Microcontrollers
AN234 - Migrating from PIC Microcontrollers to Cortex-M3
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Keil Application Notes
193: Migrating to MDK-ARM from RVDS
197: Serial-Wire Debug and Realtime Trace on STM32 Devices
202: MDK-ARM Compiler Optimizations
208: Keil uVision and Actel SmartFusion
209: Using Cortex-M3 and Cortex-M4 Fault Exceptions
220: Memory Configuration on Freescale Kinetis devices
221: Using CMSIS-DSP Algorithms with RTX
Other Documentation
AN211 - Interrupt Behavior of Cortex-M1
AN194 - Cortex-M1 Embedded Software Development
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Joseph Yiu
over 10 years ago
Thanks for the report. I have corrected the link.
regards,
Joseph
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Joseph Yiu
over 10 years ago
Thanks for the report. I have corrected the link.
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Architectures and Processors blog
Using SVE in C#
Alan Hayward
.NET 9 introduces SVE support on Arm, allowing users to write simplified vectorised code. This blog gives examples in C# and compares it to C++.
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Supporting C++ style exceptions and DWARF for Pointer Authentication Codes (PAC) signed pointers.
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Utilizing Pointer Authentication Codes (PAC) and Branch Target Instructions (BTI) together and optimizations in instruction counts.
November 19, 2024