Power management is important, and has become increasingly complex. Recently, we have created an application note. See details below. Hopefully, you will find it useful.

Purpose

• Provides high-level considerations for power management of a big.LITTLE system and helps you avoid some potential issues in your big.LITTLE design.

Intended Audience

• It is written for hardware System on Chip (SoC) designers implementing power-down and power-up sequences for ARM processors.
• It assumes that you have SoC design experience and are familiar with ARM products.

Scope

This application note focuses on the following processors and highlights important issues when powering up or powering down processor cores and clusters on an SoC.

• Cortex®-A7.
• Cortex®-A15.
• Cortex®-A17.
• Cortex®-A53.
• Cortex®-A57.
• Cortex®-A72.
• Cortex®-A73.

Outline

This application note is organized into the following chapters:

• Chapter 1 Introduction

Read this chapter for information about the purpose of the application note.

• Chapter 2 Power-down and power-up considerations

Read this chapter for high-level considerations for powerdown and powerup.

• Chapter 3 Potential SoC integration issues

Read this chapter for potential issues when implementing power management for processor cores or clusters on a typical SoC.

• Chapter 4 Hardware considerations

Read this chapter for general advice from the hardware perspective when implementing power-down and power-up sequences for big.LITTLE systems.

Your feedback

If you have any feedback about this document, please feel free to contact me. My email address is Roy.Hu@arm.com.

See the attachment for details about the application note. Thanks.