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Using ArmTF-Test SP/SPD with Juno

Hi experts  ,

I configured my Juno board as this instruction and my workspace is initialized by the script from that page too.

Now I met some unknown issues when setting secure timer for my board. I find the ARM-TF provides a test secure payload and they utilize the secure timer so I want to try this payload to confirm my board's timer works well.

In this case, I'm wondering can I still use the workspace I got to build the TSP for Juno board?

If I can, could you please give me some hints about how to modify the build scripts? If I can't, is there any other instructions about applying the TSP on Juno?

Thank you in advance.

Simon

  • Hi Simon,

    I had a quick bash at getting this to work with the existing workspace and this is what I came up with:

    1) Sync 64-bit Juno build from source Linux/Android workspace

    2) Build everything using `./build-scripts/build-all.sh all'

    3) Clean ARM Trusted Firmware:

            $ cd arm-tf/
            $ make realclean

    4) Create a build wrapper for ARM Trusted Firmware like this:

            #!/usr/bin/env bash
            CROSS_COMPILE=/path/to/gcc/bin/aarch64-elf- \
                    make PLAT=juno DEBUG=1 \
                    BL33=<workspace>/output/juno/components/juno/uboot.bin \
                    SCP_BL2=<workspace>/output/juno/components/juno_SILICON/scp-ram.bin \
                    SPD=tspd \
                    all fip

    And run it.

    5) Erase the Juno's Flash

    6) Mount the Juno's SD card, then delete everything off it

    7) Copy contents of `<workspace>/recovery/' onto Juno's SD card

    8) Copy contents of `<workspace>/output/juno/juno-busybox/uboot/' to the `/SOFTWARE/' folder on the Juno's SD card

    9) Copy these two files to the `/SOFTWARE/' folder on the Juno's SD card:

            <workspace>/arm-tf/build/juno/debug/bl1.bin
            <workspace>/arm-tf/build/juno/debug/fip.bin

    10) Issue a `sync' command on your host PC

    11) Reboot the Juno

    A few things to note:

    • This isn't using exactly the same settings as the proper Linaro workspace as I didn't bother generating certificates etc
    • This successfully booted on the Juno for me, but I'm not in the office right now so cannot verify whether the TSPD is functioning as I don't have physical access to the board (if I recall correct it echoes PSCI commands to the bottom UART)

    Also you may want to automate the copying of the components on to the SD card as it's a bit cumbersome.

    Hope that helps,
    Ash.

  • Hi Ash,

    For the script you provide, should I put the script under <workspace>/arm-tf and run it?

    Also, does the

    Ash Wilding said:
    CROSS_COMPILE=/path/to/gcc/bin/aarch64-elf- \
    means aarch64 cross compiler? It looks like I only have the aarch64-linux- , can I set the cross compiler as this one? If the workspace contains aarch64-elf- somewhere please let me know, thanks!

    Again, thank you for the instructions.

    Simon

  • Hi Simon,

    Shengye Wan said:
    For the script you provide, should I put the script under <workspace>/arm-tf and run it?

    Correct

    Shengye Wan said:

    Also, does the <snip> means aarch64 cross compiler?

    Yep

    Shengye Wan said:
    It looks like I only have the aarch64-linux- , can I set the cross compiler as this one?

    Yep that will work as ARM Trusted Firmware uses its own C library implementation

    Shengye Wan said:
    If the workspace contains aarch64-elf- somewhere please let me know

    This should work for 17.04:

    CROSS_COMPILE=<workspace>/tools/gcc/gcc-linaro-6.2.1-2016.11-x86_64_aarch64-linux-gnu/bin/aarch64-linux-gnu-

    Shengye Wan said:
    Again, thank you for the instructions

    No problem :)

    Let me know if you need any more information.

  • Hi Ash,

    The script works for me too! Thanks.

    However, I meet another issue after applying TSP and I think maybe you know the answer.

    Now after I configure the board with non-secure OE + TSPD + TSP, the above UART covers all message from NS and bottom UART only prints the NOTICE / INFO message from EL3. 

    In this case, I can't see any print information form TSP itself. If you know how to solve this issue or where should I take a look, please let me know.

    Thank you for your help!

    Best regards,

    Simon

  • Hi Simon,

    It looks like the UART is being misconfigured on Juno.

    If you navigate to `<workspace>/arm-tf/include/plat/arm/board/common' and apply these 2 patches you'll see the TSP printing messages to UART1 (the bottom UART) as expected:

    https://community.arm.com/cfs-file/__key/communityserver-discussions-components-files/80/v2m_5F00_def.patch     https://community.arm.com/cfs-file/__key/communityserver-discussions-components-files/80/board_5F00_css_5F00_def.patch

    For example:

    NOTICE: TSP: v1.3(debug):v1.3-567-g3fb340a-dirty
    NOTICE: TSP: Built : 11:54:01, Aug 7 2017
    INFO: TSP: Total memory base : 0x4001000
    INFO: TSP: Total memory size : 0xa000 bytes
    INFO: ARM GICv2 driver initialized
    INFO: TSP: cpu 0x80000100: 1 smcs, 1 erets 1 cpu on requests
    INFO: TSP: cpu 0x80000000 turned on
    INFO: TSP: cpu 0x80000000: 1 smcs, 1 erets 1 cpu on requests
    INFO: TSP: cpu 0x80000001 turned on
    INFO: TSP: cpu 0x80000001: 1 smcs, 1 erets 1 cpu on requests
    INFO: TSP: cpu 0x80000101 turned on
    INFO: TSP: cpu 0x80000101: 1 smcs, 1 erets 1 cpu on requests
    INFO: TSP: cpu 0x80000102 turned on
    INFO: TSP: cpu 0x80000102: 1 smcs, 1 erets 1 cpu on requests
    INFO: TSP: cpu 0x80000103 turned on
    INFO: TSP: cpu 0x80000103: 1 smcs, 1 erets 1 cpu on requests
    INFO: TSP: cpu 0x80000100: 2 smcs, 2 erets 1 cpu suspend requests
    INFO: TSP: cpu 0x80000001: 2 smcs, 2 erets 1 cpu suspend requests
    INFO: TSP: cpu 0x80000100 resumed. maximum off power level 0
    INFO: TSP: cpu 0x80000100: 3 smcs, 3 erets 1 cpu suspend requests
    INFO: TSP: cpu 0x80000001 resumed. maximum off power level 0
    INFO: TSP: cpu 0x80000001: 3 smcs, 3 erets 1 cpu suspend requests
    INFO: TSP: cpu 0x80000101: 2 smcs, 2 erets 1 cpu suspend requests
    INFO: TSP: cpu 0x80000001: 4 smcs, 4 erets 2 cpu suspend requests
    INFO: TSP: cpu 0x80000102: 2 smcs, 2 erets 1 cpu suspend requests

    I'll poke the ARM Trusted Firmware development team about this to see whether it's a known issue.

    Ta,
    Ash.

  • The patches work for my Juno r1 board, thank you Ash!

  • Hi Ash,

    Sorry for my many questions.. I was testing the TSP functions this morning, at first it all works okay for me.

    However, for some unknown reason, now when I copy the new-build fip.bin into the board, I always got the error:

    cp: cannot create regular file '/media/simonwan/ARM/SOFTWARE/fip.bin': Read-only file system

    I'm still trying to figure it out but I don't find any useful command to solve the issue yet.

    If you know how to solve this, please let me know, thank you!

    Simon

  • Hi Simon,

    Sounds like you'll need to reformat the Juno's SD card, for example:

    $ lsblk
    $ sudo mkfs.vfat /dev/sdX

    (Replacing `/dev/sdX' with the device label corresponding to the Juno's SD card)

    Then copy across the deliverables as normal.

    Hope that helps,
    Ash.

  • Hi ,

    I just met a problem about this issue again, could you please take a look?

    Today I used the script from this link to get the latest OE-LAMP workspace and I want to use TSP with it. I used the script with the following configuration:

    [64-bit] Juno 
    Build from source 
    Linux/Android
    lsk-4.4-armlt   -- Supports Android
    OpenEmbedded LAMP      -- 17.01

    The workspace can be builtt. Both OE-LAMP and OPTEE secure payload are running on my Juno board normally.

    However, when I tried to use TSP instead of OPTEE as you mentioned above ( I also patched 2 UART patches you shared), the booting will be stuck after these outputs:

    Peripheral ID6:0x00000005                                                       
    Peripheral ID7:0x000000B1                                                       
     
    Programming NOR Flash                                                           
    PCIE clock configured...                                                        
    
    Testing motherboard interfaces (FPGA build 118)...                              
    SRAM 32MB test: PASSED                                                          
    LAN9118   test: PASSED                                                          
    KMI1/2    test: PASSED                                                          
    MMC       test: PASSED                                                          
    PB/LEDs   test: PASSED                                                          
    FPGA UART test: PASSED                                                          
    PCIe init test: PASSED                                                          
    PCIe MAC addresss 0002-F700-62E8                                                
    MAC addrs test: PASSED                                                          
       
    SMC MAC address 0002-F700-62E7                                                  
    Setting HDMI0 mode for SVGA.                                                    
    Setting HDMI1 mode for SVGA.                                                    
      
    SoC SMB clock enabled.                                                          
    
    Testing SMB clock...                                                            
    SMB clock running                                                               
    Releasing system resets...                                                      
      
    UART0 set to SoC UART0                                                          
    UART1 set to SoC UART1           

    I guess it's still something configured wrong with TSP or TSPD while I don't figure it out yet. If you know what's the problem or which part should I check for, please let me know.

    Thank you!

  • Hi Simon,

    Please can you try building ATF -without- the UART changes, and instead take the cover off your Juno and connect to FPGA UART0 (the J55 header), and see whether that works?

  • I'll try as soon as I get the office. However, I'm still wondering why for the OPTEE case the booting can run normally while the TSP cannot?

  • Hi Simon, I'm away from the office myself without physical access to a Juno board for the next ~week, so am limited in how much I can investigate this. I'll take a look when I can, though.

  • Hi Ash, would you get a chance to look into the case this week? I tried to open my Juno box while I don't find the FPGA UART port so I think it's better for me to just configure the TSP with SoC UARTs, thank you.

  • Hi Simon,

    I think it would be wise to take this to a private case: please can you send an email to juno-support@arm.com and I'll pick it up.

    Please do keep in mind, though, that this is starting to fall out of scope of what we officially support and so I may be limited in how much I can help you.