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What is all possible SGI miss scenario?

Namu

Hi,

As we know SGI is edge trigger. Anyone know possible SGI miss/ignore scenario on GIC600?

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  • 0 in reply to Martin Weidmann

     , Thank for your help.

    I want to know 2 question.

    1) After the redistributor link offline, does all the below register set to default value?

    GICR_IPRIORITYR0
    GICR_IPRIORITYR1
    GICR_IPRIORITYR2
    GICR_IPRIORITYR3

    GICR_ICFGR0
    GICR_IGROUPR0
    GICR_IGRPMODR0
    GICR_ISENABLER0

    2) Which sequence is correct sequence for redistributor?

        a. Configure the above redistributor register --> Make redistributor link online.

        b. Make redistributor link online --> Configure the above redistributor register.

        c. sequence doesn't matter.

    Thank you in advance. Waiting for your reply

Reply
  • 0 in reply to Martin Weidmann

     , Thank for your help.

    I want to know 2 question.

    1) After the redistributor link offline, does all the below register set to default value?

    GICR_IPRIORITYR0
    GICR_IPRIORITYR1
    GICR_IPRIORITYR2
    GICR_IPRIORITYR3

    GICR_ICFGR0
    GICR_IGROUPR0
    GICR_IGRPMODR0
    GICR_ISENABLER0

    2) Which sequence is correct sequence for redistributor?

        a. Configure the above redistributor register --> Make redistributor link online.

        b. Make redistributor link online --> Configure the above redistributor register.

        c. sequence doesn't matter.

    Thank you in advance. Waiting for your reply

Children
  • +1 Arm Employee Badge in reply to Namu
    Namu said:
    1) After the redistributor link offline, does all the below register set to default value?

    No, changing GICR_WAKER (whether taking online or offline) has no effect on the values in the GICR_IxyzR registers.

    Namu said:

    2) Which sequence is correct sequence for redistributor?

        a. Configure the above redistributor register --> Make redistributor link online.

        b. Make redistributor link online --> Configure the above redistributor register.

        c. sequence doesn't matter.

    From a pure GIC perspective, they're independent tasks and the behaviour is defined for both orders.

    It might matter to your software flow. For example, if you start configuring interrupts and sending SGIs you might see the GIC generate wake-requests.  What (if anything) happens in response to the wake-request is specific to the SoC.

  • 0 in reply to Martin Weidmann

    Thank you for your reply.

     I have raised another question. Can you please help to find the answer there?

    community.arm.com/.../gicd_igrpmodr-0-register-read-as-0