The ARM720T user manual mentions small and large pages. Since the ARM 720T requires a 64KB page table entry to be duplicated 16 times in the page table, why not place 16 small page (4KB) entries to mimic a 64KB page entry instead of using a large page in the first place? Duplicating the entry 16 times waste page table space and couldn't they've gone with a modified L1 descriptor to indicate a larger page or something like that?
I think your understanding of
"Since the ARM 720T requires a 64KB page table entry to be duplicated 16 times in the page table"
In the 64KB page case, only one page descriptor would be enough for one 64KB page.
Large Pages are supported to allow mapping of a large region of memory while using only a single entry in the TLB.
Using large page keeps the size of MMU table unchanged, which is good for MMU hardware to perform table walk. Otherwise, using part of VA address bit to index the table would depend on whether or not larger page is used and number of large pages. It would make MMU hardware more complicated..
Meanwhile, larger page benefits TLB, 16 table entry only uses one TLB entry for large page.