On a Cortex R, where ldm/stm are interruptible, can i use ldrex and strex for double words to pass from ISR to a task in this way?
STREXD, // Ignoring (yes, dumping it) if it actually failed to write , do no spin-lock or retry here at all
in Task :
LDREXD // load .. CLREX // clear exclusion
One core (2 in dual lock-step), no sharing mem with other cores. Will this work for automically write/read double words in the scenario one ISR feeding a task?
And yes, no buffering between them.
I understand the note in the manual like this. Hard to test anyway :(
"foreground process" is that code which is interrupted.
42Bastian Schick you very most likely right, but how do I jump to the exact note / para you referring too:
I do see someone's C11 atomic implementation and it deff does ldrxed first, but I thought that's only because it does the spinlock .