Using LDREXD in a task/normal mode and STREXD in ISR

On a Cortex R,  where ldm/stm are interruptible, can i use ldrex and strex for double words to pass from ISR to a task in this way?

in ISR:

 STREXD,   //  Ignoring  (yes, dumping it)  if it actually failed to write , do no spin-lock or retry here at all

in Task :

  LDREXD   // load ..
  CLREX     // clear exclusion

One core  (2 in dual lock-step),  no sharing mem with other cores.  Will this work for automically write/read double words in the scenario one ISR feeding a task?

And yes, no buffering between them.

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  • No, you can't. See "A3.5.3   Atomicity in the ARM architecture" in DDI0406C (ARMv7RA_ARM).

    I think you need to follow the note in the chapter, and do ldrex/strexd in the foreground process. If strexd fails, you know, the ISR has written the data (as it has "cleared" the lock).

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  • No, you can't. See "A3.5.3   Atomicity in the ARM architecture" in DDI0406C (ARMv7RA_ARM).

    I think you need to follow the note in the chapter, and do ldrex/strexd in the foreground process. If strexd fails, you know, the ISR has written the data (as it has "cleared" the lock).

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