I am trying to enable stage-2 translation for Armv8 aarch32, cortex-a53. If I set HCR.VM=1(enable stage-2 translation) it will crash. I suspect it does not set up stage-2 translation table. But when I read the Arm Architecture Reference Manual, I cannot find the pseudo-code for creating such table(only find pictures).
So could anyone provide some code or pseudo-code for creating stage-2 translation table?
Have you visited here? https://developer.arm.com/architectures/learn-the-architecture/aarch64-virtualization/stage-2-translation
Also, I am moving this thread to the "Cortex-A / A-Profile" category 
Actually I have done it by modifying the source code of Linux kernel. I decide to create the stage 2 translation table and set HCR when it enter EL2.
Hello, I would like to ask if you can provide the following code for setting the stage 2 translation table and setting HCR, we have been troubled for a long time.Thank you.
You could have a look at hafnium project, which is type1 hypervisor