Arm Community
Arm Community
  • Site
  • User
  • Site
  • Search
  • User
Support forums
Support forums

Architectures and Processors forum

  • Jump...
  • Cancel
  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3538 Questions
Help a member

Have a question? If you can, please take a moment to also see if there is a question that you are able to answer.

  • Tags
  • RSS
  • More actions
  • Cancel
Other forums
  • AI forum

  • Architectures and Processors forum

  • Arm Development Platforms forum

  • Arm Development Studio forum

  • Arm Virtual Hardware forum

  • Automotive forum

  • Compilers and Libraries forum

  • Embedded and Microcontrollers forum

  • High Performance Computing (HPC) forum

  • Internet of Things (IoT) forum

  • Keil forum

  • Laptops and Desktops forum

  • Mobile, Graphics, and Gaming forum

  • Morello forum

  • Operating Systems forum

  • Servers and Cloud Computing forum

  • SoC Design and Simulation forum

  • SystemReady Forum

  • Not Answered

    Forum FAQs 0

    • ARM Community
    8340 views
    0 replies
    Started over 4 years ago
    by Annie Arm Employee Badge
  • Answered

    C2C SNP Address width diff from CHI 0

    • CHI
    • C2C
    321 views
    6 replies
    Latest 2 days ago
    by Lingfan Tang
  • Not Answered

    Unexpected result from svqdmulh_s32 with negative input values 0

    • intrinsics
    • NEON
    • Cortex-A
    • SVE2
    68 views
    0 replies
    Started 2 days ago
    by Yevh Prill
  • Not Answered

    Question about the performance overhead introduced by the MTE mechanism 0

    • performance
    • Cortex-A
    • MTE
    • SPEC2017
    77 views
    0 replies
    Started 4 days ago
    by Peng Mingfan
  • Not Answered

    Where can I find the description of hwcpipe_counter? 0

    89 views
    0 replies
    Started 7 days ago
    by Qing Chen
  • Not Answered

    ARMv8 halt address after reset with EDECR.RC set 0

    • Armv8-R
    99 views
    0 replies
    Started 9 days ago
    by Lee Leon
  • Answered

    How to automatically reset CR52 with warm reset request 0

    • Cortex-R52
    • Armv8-R
    170 views
    1 reply
    Latest 14 days ago
    by Martin Weidmann Arm Employee Badge
  • Answered

    How To Access SCTLR_EL1 of Non Secure World From EL3 0

    • EL3
    • Trusted Firmware-A
    • fvp
    372 views
    4 replies
    Latest 16 days ago
    by Dev Gandhi
  • Suggested Answer

    Handshake signal behavior in CHI spec 0

    • UCIe
    • CHI
    • C2C
    174 views
    1 reply
    Latest 16 days ago
    by Simone Secchi Arm Employee Badge
  • Not Answered

    Exclusive store op hang 0

    127 views
    0 replies
    Started 16 days ago
    by Djole Prolece
  • Not Answered

    Arm Cortex M4 Exception Exit Being interrupted 0

    • Cortex-M4
    127 views
    0 replies
    Started 17 days ago
    by Satyajit Patil
  • Answered

    Stalls in float point calcultions 0

    • NEON
    • pipeline
    • SVE2
    • SVE
    • Floating Point
    300 views
    3 replies
    Latest 18 days ago
    by Martin Weidmann Arm Employee Badge
  • Suggested Answer

    Cortex A53 Cycle Counting, Single-Step 0

    • Armv8-A
    • Performance Monitor Unit (PMU)
    • Debug Access Port (DAP)
    383 views
    2 replies
    Latest 18 days ago
    by Ronan Synnott Arm Employee Badge
  • Answered

    Some instruction variants' encodings in `Instructions.json` missing constant bits. 0

    215 views
    1 reply
    Latest 20 days ago
    by Mohamed Maaliki
  • Suggested Answer

    Can Cross Trigger Configure Multiple Cores to Halt Simultaneously in Self-Hosted Debug? 0

    • Armv8-A
    230 views
    1 reply
    Latest 23 days ago
    by Stephen Theobald Arm Employee Badge
  • Not Answered

    GIC-700 SPI routing in multichip system 0

    • Multichip
    • GICv3/v4
    • Interrupt
    • spi
    117 views
    0 replies
    Started 23 days ago
    by 륜현 김
  • Not Answered

    Unable to Read/Write Non-Secure EL1 System Registers (e.g., SCTLR_EL1) from EL3 on FVP with OP-TEE and TF-A 0

    • Arm Trusted Firmware
    • Interrupt Handling
    • EL3
    • Armv8-A
    • Trusted Firmware-A
    • TrustZone
    • fvp
    • Linux
    215 views
    0 replies
    Started 1 month ago
    by Dev Gandhi
  • Answered

    ARMv9 core (such as A720)can bring VMID(or StreamID) to external fabric? 0

    • virtualization
    • Armv9
    266 views
    1 reply
    Latest 1 month ago
    by Martin Weidmann Arm Employee Badge
  • Answered

    GIC-600 How to drop down ICC_RPR_EL1 to normal 0xFF without INTID 0

    366 views
    2 replies
    Latest 1 month ago
    by duanlin
  • Answered

    ARM®︎ Cortex®︎-A53 MPCore Processor rev. r0p4 lint errors +1

    • Cortex-A53
    • lint
    • asic
    273 views
    1 reply
    Latest 1 month ago
    by Ronan Synnott Arm Employee Badge
>
Topics being discussed in this forum
  • AArch64
  • AMBA
  • Arm Assembly Language (ASM)
  • Armv7-A
  • Armv8-A
  • Armv8-M
  • AXI
  • Cache
  • Cortex-A
  • Cortex-A53
  • Cortex-A7
  • Cortex-A8
  • Cortex-A9
  • Cortex-M
  • Cortex-M0
  • Cortex-M3
  • Cortex-M4
  • Cortex-M7
  • Cortex-R
  • Interrupt
  • Linux
  • Memory
  • Memory Management Unit (MMU)
  • NEON
  • TrustZone