Arm Community
Arm Community
  • Site
  • User
  • Site
  • Search
  • User
Support forums
Support forums

Architectures and Processors forum

  • Jump...
  • Cancel
  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3626 Questions
Help a member

Have a question? If you can, please take a moment to also see if there is a question that you are able to answer.

  • Tags
  • RSS
  • More actions
  • Cancel
Other forums
  • AI forum

  • Architectures and Processors forum

  • Arm Development Platforms forum

  • Arm Development Studio forum

  • Arm Virtual Hardware forum

  • Automotive forum

  • Compilers and Libraries forum

  • Embedded and Microcontrollers forum

  • High Performance Computing (HPC) forum

  • Internet of Things (IoT) forum

  • Keil forum

  • Laptops and Desktops forum

  • Mobile, Graphics, and Gaming forum

  • Morello forum

  • Operating Systems forum

  • Servers and Cloud Computing forum

  • SoC Design and Simulation forum

  • SystemReady Forum

  • TOSA forum

  • Not Answered

    Forum FAQs 0

    • ARM Community
    8727 views
    0 replies
    Started over 5 years ago
    by Annie
  • Not Answered

    ECC Test for A53 Cache memories 0

    • Cortex-A53
    • Cache Architecture
    62 views
    0 replies
    Started 3 days ago
    by Nihar Potturu
  • Not Answered

    CFP RCTX instruction on Neoverse-N3 0

    • EL1
    • AArch64
    • Security
    • Neoverse
    • Branch Prediction
    111 views
    0 replies
    Started 11 days ago
    by Gal Kaptsenel
  • Answered

    Cortex-M85 & Cortex-M55 Core ID 0

    • Cortex-M55
    • Cortex-M85
    1125 views
    3 replies
    Latest 15 days ago
    by Mahmood Yakub Arm Employee Badge
  • Suggested Answer

    AXI5 0

    • AMBA 5
    167 views
    2 replies
    Latest 15 days ago
    by Ben Hicks Arm Employee Badge
  • Not Answered

    Dormant state for debug 0

    • Debugging
    146 views
    0 replies
    Started 16 days ago
    by Yael Kanter-Weisman
  • Not Answered

    the issue of different execution times for the same assembly code on Cortex-A53 0

    466 views
    4 replies
    Latest 17 days ago
    by Martin Weidmann Arm Employee Badge
  • Suggested Answer

    Question about Snoop Response for SnpCleanShared using CHIE.b? 0

    • CHI
    189 views
    1 reply
    Latest 17 days ago
    by Ben Hicks Arm Employee Badge
  • Suggested Answer

    Does TCM configured as Strongly ordered memory have alignment alignment requirements? 0

    • Cortex-R5
    263 views
    3 replies
    Latest 20 days ago
    by Martin Weidmann Arm Employee Badge
  • Answered

    How AXI Handle unaligned transfer in FIX and INCR mode. 0

    281 views
    2 replies
    Latest 22 days ago
    by roshan ekre
  • Not Answered

    M33 parallel trace clock 0

    • Debug and Trace
    211 views
    0 replies
    Started 1 month ago
    by Yael Kanter-Weisman
  • Not Answered

    Behaviour of ERRSTATUS when injecting CE and DE via Pseudo Fault Generation. 0

    188 views
    0 replies
    Started 1 month ago
    by anoop
  • Not Answered

    Base Address of AHB-AP in DAPlite-2 0

    • Debug Access Port (DAP)
    164 views
    0 replies
    Started 1 month ago
    by RAGHU CHOWDAM
  • Not Answered

    Cortex-M7 Processor Accessing Illegal Address Interval Report RESEP=2'b11 0

    271 views
    2 replies
    Latest 1 month ago
    by yangfang
  • Not Answered

    The Cortex-R52+Processor has AIXM interface, AXI_FLASH interface performance 0

    118 views
    0 replies
    Started 1 month ago
    by yangfang
  • Not Answered

    AHB Write Access With wait states 0

    • AMBA
    • AMBA 3 AHB Interface
    • AHB
    282 views
    1 reply
    Latest 1 month ago
    by Colin Campbell Arm Employee Badge
  • Not Answered

    The HREADY signal connection issue in an AHB5 busmatrix 0

    179 views
    0 replies
    Started 1 month ago
    by yangfang
  • Not Answered

    DMA Controller PL230 - Why N is multiple for 4 in scatter-gather mode ? 0

    • DMA Devices
    • PrimeCell µDMAController (PL230)
    147 views
    0 replies
    Started 1 month ago
    by hk_007
  • Not Answered

    Question about the 64-bytes aligned granule access for write request with RO=1, in Server Base System Architecture, DEN0029J 8.0 0

    162 views
    0 replies
    Started 2 months ago
    by Junji Koyama
  • Suggested Answer

    NEED HELP 0

    331 views
    1 reply
    Latest 2 months ago
    by Colin Campbell Arm Employee Badge
>