Arm Community
Site
Search
User
Site
Search
User
Groups
Arm Research
DesignStart
Education Hub
Innovation
Open Source Software and Platforms
Forums
AI and ML forum
Architectures and Processors forum
Arm Development Platforms forum
Arm Development Studio forum
Arm Virtual Hardware forum
Automotive forum
Compilers and Libraries forum
Graphics, Gaming, and VR forum
High Performance Computing (HPC) forum
Infrastructure Solutions forum
Internet of Things (IoT) forum
Keil forum
Morello Forum
Operating Systems forum
SoC Design and Simulation forum
中文社区论区
Blogs
AI and ML blog
Announcements
Architectures and Processors blog
Automotive blog
Graphics, Gaming, and VR blog
High Performance Computing (HPC) blog
Infrastructure Solutions blog
Innovation blog
Internet of Things (IoT) blog
Mobile blog
Operating Systems blog
Research Articles
SoC Design and Simulation blog
Smart Homes
Tools, Software and IDEs blog
Works on Arm blog
中文社区博客
Support
Open a support case
Documentation
Downloads
Training
Arm Approved program
Arm Design Reviews
Community Help
More
Cancel
DesignStart
DesignStart forum
Blog
Forum
Videos & Files
Jump...
Cancel
New
DesignStart requires membership for participation - click to join
DesignStart forum
Description
Technical discussion and Q&A forum for users of following programs: - DesignStart Tier of Arm Flexible Access - DesignStart Eval - DesignStart FPGA
Threads
181 Questions
Tell us what you think
Tags
RSS
More actions
Cancel
Related tags
ACE
AXI
CHI
Cortex-M
Cortex-M Prototyping System (V2M-MPS2)
Cortex-M0
Cortex-M1
Cortex-M3
Custom SoC
DesignStart
FPGA
Keil
MPI
Simulation
Verilog
More developer forums
No results could be found.
DesignStart forum
By title
By date
By reply count
By view count
By most asked
By votes
By quality
Descending
Ascending
All recent questions
Unread questions
Questions you've participated in
Questions you've asked
Unanswered questions
Answered questions
Questions with suggested answers
Questions with no replies
Not Answered
Inconsistency with ATPG model / Verilog-Sim model
0
42
views
0
replies
Started
1 day ago
by
taijin
Not Answered
How to red data from ouside(example pins),not from external memory or similar?
0
790
views
1
reply
Latest
1 month ago
by
Graham Cunningham
Not Answered
Gate count for A53, A57 processors
0
369
views
0
replies
Started
1 month ago
by
PChhabra
Suggested Answer
'xilinx.com:ip:axi_bram_ctrl:4.0' does not support the current part 'xc7a35ticsg324-1L'
0
AXI
DesignStart
Support
Block
8608
views
6
replies
Latest
4 months ago
by
I need caffeine
Not Answered
About Arm DK Download list
0
1144
views
0
replies
Started
6 months ago
by
jung heum park
Not Answered
Mix ARM assembler and C Keil book interrupts ROM external memory
0
2027
views
1
reply
Latest
6 months ago
by
Stuart Hirons
Suggested Answer
cortex M0 debug
0
1264
views
1
reply
Latest
7 months ago
by
Haiyan
Suggested Answer
RTL simulation for designStart Cortex-M0 , M3 and M4
0
Cortex-M
Simulation Models
1252
views
1
reply
Latest
7 months ago
by
Haiyan
Suggested Answer
AHB HSIZE usage
0
3682
views
2
replies
Latest
7 months ago
by
Haiyan
Not Answered
Pinout description of Cortex M0
0
4459
views
2
replies
Latest
7 months ago
by
Haiyan
Not Answered
Mix ARM assembler and C Keil book interrupts rom external memory
0
1184
views
0
replies
Started
7 months ago
by
Pero Kacov
Answered
Cortex-m0 interrupt_demo simulation issue
+1
Cortex-M0
Simulation
GPIO
Microcontroller
DesignStart
Cortex-M
System Design
Interrupt
6975
views
10
replies
Latest
7 months ago
by
Adnan Ashraf
Not Answered
delete
0
1020
views
0
replies
Started
10 months ago
by
JDeveloper
Suggested Answer
cortex M0+ for MSP3
0
Cortex-M0/M0+ System Design Kit
1019
views
1
reply
Latest
over 1 year ago
by
Mahesh
Not Answered
Modify FPGA image for MPS2+ using the Cortex-M33
+1
1291
views
0
replies
Started
over 1 year ago
by
Sean Rivera
Not Answered
Can I build a Cortex-M4 with DSP extensions on the V2M-MPS2+ board?
0
2761
views
2
replies
Latest
over 1 year ago
by
Antonio Ken Iannillo
Not Answered
How to debug Cortex Desingstart Board without DAPLink?
0
JTAG
Cortex-M
SWD
Debugger
571
views
0
replies
Started
over 1 year ago
by
Shiping
Not Answered
CM0 DesignStart Eval FPGA compile error on MPS2+
0
535
views
0
replies
Started
over 1 year ago
by
jimi
Not Answered
Porting AT472-BU-98000-r0p1-00rel0 to Avnet 7a50t development board failed
0
643
views
0
replies
Started
over 1 year ago
by
x_gate
Not Answered
How to send the encoder/ pulses over serial port of 8051
0
726
views
0
replies
Started
over 1 year ago
by
Vignesh vsg
>