Improving the characteristics of interconnects as device dimensions scale smaller.

SMU has been working on the SAP Next-Gen student project, to develop innovative sustainability solutions using SAP software and real-world IoT devices from Arm's partner ecosystem.

Sorbonne Université has been using Arm processor source code for modelling and verification on the hardware at the micro-architectural level.

Current solutions to improve virtual to physical translation performance are impractical. We present an alternative, where a small change has a significant impact.

SpiNNaker1 connected a million mobile phone processors, operating in some ways like a brain. SpiNNaker2 will drive the next generation of AI.

University Program materials are now even easier to access via GitHub. Use our resources, tools and more to spark the potential of your students.

On-device automatic speech recognition is now becoming feasible and is useful in scenarios without internet connection or when data privacy is a concern.

Read about two Arm-sponsored PhD students and their work into Smart Atomic Memory Operations and Advanced Sparse Data Structures at the Arm-BSC Centre of Excellence.

Arm Research are investigating a hardware-software codesign solution to support auto-vectorization, called Speculative Vectorization with Selective Replay.

Korea Electronics Technology Institute director Sungho Lee gives us the lowdown on their Radar SoC innovations – and how his team’s ambitions were enabled with Arm’s Cortex-M3 and NIC-400.

APOLLO achieves fast, yet accurate power-modelling for both design- and runtime power-introspection within the same unified framework.

Most conventional FPGA-based accelerators use off-chip memory for data transformation, then perform computation for a single-layer in a time-multiplexed manner. Throughput is often limited by the memory…

In part-two we continue to explore the simulation, characterization, and analysis of MRAM stochasticity, sharing a compact model and framework.

In part-two of the scalable MTJ simulation, we share a compact model and framework for the efficient and scalable simulation of circuits with MRAMs.

PlasticArm is bringing the possibility of seamlessly embedding billions of extremely low-cost, ultra-thin, conformable microprocessors into everyday objects – a significant leap forward in realising the…

Buried interconnects can help mitigate the interconnect resistance issue and augment the technology scaling roadmap for sub-5nm process nodes.

TinyML seeks to deploy ML algorithms on ultra low power systems, to enable us to intelligently select which data to transmit, improving energy efficiency.

We share the experiences of four of our colleagues, offering professional advice for those starting their career, and aiding understanding of what it's like to be a women in engineering.

Our research explores how adding new explicit instructions which define their fine-grain ordering requirements could reduce the need for memory barriers.

IoT devices collect and transmit data to the cloud, where it is then analyzed and ML models trained. Privacy challenges arise when users are reluctant to share their personal data.

The workshop held in conjunction with MLSys 2021 brought researchers and practitioners together to discuss key issues, share new research results and practical tutorial material.